Merge changes from topic "allwinner_bl31_size" into integration
* changes: Reduce space lost to object alignment imx: Fix multiple definition of ipc_handle imx: Fix missing inclusion of cdefs.h
This commit is contained in:
commit
f224bd4ee2
5
Makefile
5
Makefile
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@ -296,8 +296,9 @@ CPPFLAGS = ${DEFINES} ${INCLUDES} ${MBEDTLS_INC} -nostdinc \
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ASFLAGS += $(CPPFLAGS) $(ASFLAGS_$(ARCH)) \
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-ffreestanding -Wa,--fatal-warnings
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TF_CFLAGS += $(CPPFLAGS) $(TF_CFLAGS_$(ARCH)) \
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-ffreestanding -fno-builtin -std=gnu99 \
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-Os -ffunction-sections -fdata-sections
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-ffunction-sections -fdata-sections \
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-ffreestanding -fno-builtin -fno-common \
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-Os -std=gnu99
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ifeq (${SANITIZE_UB},on)
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TF_CFLAGS += -fsanitize=undefined -fno-sanitize-recover
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14
bl1/bl1.ld.S
14
bl1/bl1.ld.S
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -27,7 +27,7 @@ SECTIONS
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.text . : {
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__TEXT_START__ = .;
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*bl1_entrypoint.o(.text*)
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*(.text*)
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*(SORT_BY_ALIGNMENT(.text*))
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*(.vectors)
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. = ALIGN(PAGE_SIZE);
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__TEXT_END__ = .;
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@ -44,7 +44,7 @@ SECTIONS
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.rodata . : {
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__RODATA_START__ = .;
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*(.rodata*)
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*(SORT_BY_ALIGNMENT(.rodata*))
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/* Ensure 8-byte alignment for descriptors and ensure inclusion */
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. = ALIGN(8);
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@ -72,8 +72,8 @@ SECTIONS
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ro . : {
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__RO_START__ = .;
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*bl1_entrypoint.o(.text*)
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*(.text*)
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*(.rodata*)
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*(SORT_BY_ALIGNMENT(.text*))
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*(SORT_BY_ALIGNMENT(.rodata*))
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/* Ensure 8-byte alignment for descriptors and ensure inclusion */
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. = ALIGN(8);
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@ -114,7 +114,7 @@ SECTIONS
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*/
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.data . : ALIGN(16) {
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__DATA_RAM_START__ = .;
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*(.data*)
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*(SORT_BY_ALIGNMENT(.data*))
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__DATA_RAM_END__ = .;
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} >RAM AT>ROM
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@ -131,7 +131,7 @@ SECTIONS
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*/
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.bss : ALIGN(16) {
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__BSS_START__ = .;
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*(.bss*)
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*(SORT_BY_ALIGNMENT(.bss*))
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*(COMMON)
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__BSS_END__ = .;
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} >RAM
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12
bl2/bl2.ld.S
12
bl2/bl2.ld.S
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -27,7 +27,7 @@ SECTIONS
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.text . : {
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__TEXT_START__ = .;
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*bl2_entrypoint.o(.text*)
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*(.text*)
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*(SORT_BY_ALIGNMENT(.text*))
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*(.vectors)
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. = ALIGN(PAGE_SIZE);
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__TEXT_END__ = .;
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@ -44,7 +44,7 @@ SECTIONS
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.rodata . : {
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__RODATA_START__ = .;
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*(.rodata*)
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*(SORT_BY_ALIGNMENT(.rodata*))
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/* Ensure 8-byte alignment for descriptors and ensure inclusion */
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. = ALIGN(8);
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@ -59,8 +59,8 @@ SECTIONS
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ro . : {
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__RO_START__ = .;
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*bl2_entrypoint.o(.text*)
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*(.text*)
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*(.rodata*)
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*(SORT_BY_ALIGNMENT(.text*))
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*(SORT_BY_ALIGNMENT(.rodata*))
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/* Ensure 8-byte alignment for descriptors and ensure inclusion */
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. = ALIGN(8);
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@ -93,7 +93,7 @@ SECTIONS
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*/
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.data . : {
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__DATA_START__ = .;
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*(.data*)
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*(SORT_BY_ALIGNMENT(.data*))
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__DATA_END__ = .;
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} >RAM
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -44,7 +44,7 @@ SECTIONS
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*bl2_el3_entrypoint.o(.text*)
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*(.text.asm.*)
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__TEXT_RESIDENT_END__ = .;
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*(.text*)
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*(SORT_BY_ALIGNMENT(.text*))
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*(.vectors)
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. = ALIGN(PAGE_SIZE);
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__TEXT_END__ = .;
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@ -52,7 +52,7 @@ SECTIONS
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.rodata . : {
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__RODATA_START__ = .;
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*(.rodata*)
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*(SORT_BY_ALIGNMENT(.rodata*))
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/* Ensure 8-byte alignment for descriptors and ensure inclusion */
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. = ALIGN(8);
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@ -82,8 +82,8 @@ SECTIONS
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*bl2_el3_entrypoint.o(.text*)
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*(.text.asm.*)
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__TEXT_RESIDENT_END__ = .;
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*(.text*)
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*(.rodata*)
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*(SORT_BY_ALIGNMENT(.text*))
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*(SORT_BY_ALIGNMENT(.rodata*))
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/*
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* Ensure 8-byte alignment for cpu_ops so that its fields are also
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@ -135,7 +135,7 @@ SECTIONS
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*/
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.data . : {
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__DATA_RAM_START__ = .;
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*(.data*)
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*(SORT_BY_ALIGNMENT(.data*))
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__DATA_RAM_END__ = .;
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} >RAM AT>ROM
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -27,7 +27,7 @@ SECTIONS
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.text . : {
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__TEXT_START__ = .;
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*bl2u_entrypoint.o(.text*)
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*(.text*)
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*(SORT_BY_ALIGNMENT(.text*))
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*(.vectors)
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. = ALIGN(PAGE_SIZE);
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__TEXT_END__ = .;
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@ -44,7 +44,7 @@ SECTIONS
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.rodata . : {
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__RODATA_START__ = .;
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*(.rodata*)
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*(SORT_BY_ALIGNMENT(.rodata*))
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. = ALIGN(PAGE_SIZE);
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__RODATA_END__ = .;
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} >RAM
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@ -52,8 +52,8 @@ SECTIONS
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ro . : {
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__RO_START__ = .;
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*bl2u_entrypoint.o(.text*)
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*(.text*)
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*(.rodata*)
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*(SORT_BY_ALIGNMENT(.text*))
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*(SORT_BY_ALIGNMENT(.rodata*))
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*(.vectors)
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__RO_END_UNALIGNED__ = .;
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@ -80,7 +80,7 @@ SECTIONS
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*/
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.data . : {
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__DATA_START__ = .;
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*(.data*)
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*(SORT_BY_ALIGNMENT(.data*))
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__DATA_END__ = .;
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} >RAM
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@ -33,7 +33,7 @@ SECTIONS
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.text . : {
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__TEXT_START__ = .;
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*bl31_entrypoint.o(.text*)
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*(.text*)
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*(SORT_BY_ALIGNMENT(.text*))
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*(.vectors)
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. = ALIGN(PAGE_SIZE);
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__TEXT_END__ = .;
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@ -41,7 +41,7 @@ SECTIONS
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.rodata . : {
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__RODATA_START__ = .;
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*(.rodata*)
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*(SORT_BY_ALIGNMENT(.rodata*))
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/* Ensure 8-byte alignment for descriptors and ensure inclusion */
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. = ALIGN(8);
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@ -87,8 +87,8 @@ SECTIONS
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ro . : {
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__RO_START__ = .;
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*bl31_entrypoint.o(.text*)
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*(.text*)
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*(.rodata*)
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*(SORT_BY_ALIGNMENT(.text*))
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*(SORT_BY_ALIGNMENT(.rodata*))
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/* Ensure 8-byte alignment for descriptors and ensure inclusion */
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. = ALIGN(8);
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@ -179,7 +179,7 @@ SECTIONS
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*/
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.data . : {
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__DATA_START__ = .;
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*(.data*)
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*(SORT_BY_ALIGNMENT(.data*))
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__DATA_END__ = .;
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} >RAM
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@ -211,7 +211,7 @@ SECTIONS
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*/
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.bss (NOLOAD) : ALIGN(16) {
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__BSS_START__ = .;
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*(.bss*)
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*(SORT_BY_ALIGNMENT(.bss*))
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*(COMMON)
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#if !USE_COHERENT_MEM
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/*
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -7,6 +7,7 @@
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#ifndef IMX_CAAM_H
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#define IMX_CAAM_H
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#include <cdefs.h>
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#include <stdint.h>
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#include <arch.h>
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#include <imx_regs.h>
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@ -1,11 +1,12 @@
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/*
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* Copyright (C) 2018, ARM Limited and Contributors. All rights reserved.
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* Copyright (C) 2018-2019, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef IMX_SNVS_H
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#define IMX_SNVS_H
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#include <cdefs.h>
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#include <stdint.h>
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#include <arch.h>
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -62,6 +62,6 @@ void sc_ipc_read(sc_ipc_t ipc, void *data);
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*/
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void sc_ipc_write(sc_ipc_t ipc, void *data);
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sc_ipc_t ipc_handle;
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extern sc_ipc_t ipc_handle;
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#endif /* SCI_IPC_H */
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -13,6 +13,8 @@
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#include <sci/sci_rpc.h>
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#include "imx8_mu.h"
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sc_ipc_t ipc_handle;
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DEFINE_BAKERY_LOCK(sc_ipc_bakery_lock);
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#define sc_ipc_lock_init() bakery_lock_init(&sc_ipc_bakery_lock)
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#define sc_ipc_lock() bakery_lock_get(&sc_ipc_bakery_lock)
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