Tegra186: mce: get the "right" uncore command/response bits
This patch corrects the logic to read the uncore command/response bits from the command/response values. The previous logic tapped into incorrect bits leading to garbage counter values. Change-Id: Ib8327ca3cb3d2086bb268e9a5366865cdf35b493 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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@ -64,19 +64,17 @@
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#define MCA_ARG_FINISH_MASK U(0xFF)
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/*******************************************************************************
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* Uncore PERFMON ARI struct
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* Uncore PERFMON ARI macros
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******************************************************************************/
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#define UNCORE_PERFMON_CMD_READ U(0)
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#define UNCORE_PERFMON_CMD_WRITE U(1)
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#define UNCORE_PERFMON_CMD_MASK U(0xFF)
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#define UNCORE_PERFMON_CMD_SHIFT U(24)
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#define UNCORE_PERFMON_UNIT_GRP_MASK U(0xF)
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#define UNCORE_PERFMON_SELECTOR_MASK U(0xF)
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#define UNCORE_PERFMON_REG_MASK U(0xFF)
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#define UNCORE_PERFMON_CTR_MASK U(0xFF)
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#define UNCORE_PERFMON_RESP_STATUS_MASK U(0xFF)
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#define UNCORE_PERFMON_RESP_STATUS_SHIFT U(24)
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/*******************************************************************************
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* Structure populated by arch specific code to export routines which perform
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@ -503,7 +503,7 @@ int32_t ari_read_write_uncore_perfmon(uint32_t ari_base, uint64_t req,
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uint32_t val, req_status;
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uint8_t req_cmd;
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req_cmd = (uint8_t)(req >> UNCORE_PERFMON_CMD_SHIFT);
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req_cmd = (uint8_t)(req & UNCORE_PERFMON_CMD_MASK);
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/* clean the previous response state */
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ari_clobber_response(ari_base);
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@ -533,7 +533,7 @@ int32_t ari_read_write_uncore_perfmon(uint32_t ari_base, uint64_t req,
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* For "read" commands get the data from the uncore
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* perfmon registers
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*/
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req_status >>= UNCORE_PERFMON_RESP_STATUS_SHIFT;
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req_status &= UNCORE_PERFMON_RESP_STATUS_MASK;
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if ((req_status == 0U) && (req_cmd == UNCORE_PERFMON_CMD_READ)) {
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*data = ari_get_response_low(ari_base);
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}
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