Commit Graph

603 Commits

Author SHA1 Message Date
Sandrine Bailleux 26e9984186 Juno: Move to the new ARM SCP Messaging Interfaces
The communication protocol used between the AP cores and the SCP
has undergone a number of changes. This patch makes the required
modifications to the SCP Boot Protocol, SCPI Protocol and MHU
driver code in the Juno platform code so that the AP cores are
still able to communicate with the SCP.

This patch focuses on the mandatory changes to make it work. The
design of this code needs to be improved but this will come in
a subsequent patch.

The main changes are:

 - MHU communication protocol

   - The command ID and payload size are no longer written into the
     MHU registers directly. Instead, they are stored in the payload
     area. The MHU registers are now used only as a doorbell to kick
     off messages. Same goes for any command result, the AP has to
     pick it up from the payload area.

 - SCP Boot Protocol

   - The BL3-0 image is now expected to embed a checksum. This
     checksum must be passed to the SCP, which uses it to check the
     integrity of the image it received.

   - On Juno, the BL3-0 image used to be transferred a block (4KB)
     at a time. The SCP now supports receiving up to 128KB at a
     time, which is more than the size of the BL3-0 image.
     Therefore, the image is now sent in one go.

   - The command IDs have changed.

 - SCPI Protocol

   - On Juno, the size of the SCPI payload has been reduced down
     from 512 bytes to 256 bytes. This changes the base address
     of the AP-to-SCP payload area.

   - For commands that have a response, the response is the same SCPI
     header that was sent, except for the size and the status, which
     both must be updated appropriately. Success/Failure of a command
     is determined by looking at the updated status code.

   - Some command IDs have changed.

NOTE: THIS PATCH BREAKS COMPATIBILITY WITH FORMER VERSIONS OF THE SCP
FIRMWARE AND THUS REQUIRES AN UPDATE OF THIS BINARY. THE LATEST SCP
BINARY CAN BE OBTAINED FROM ARM CONNECTED COMMUNITY WEBSITE.

Change-Id: Ia5f6b95fe32401ee04a3805035748e8ef6718da7
2015-04-13 17:47:31 +01:00
danh-arm da85170d9a Merge pull request #289 from danh-arm/vw/tlkd-args-via-cpu-regs-v4
Pass arguments/results between EL3/S-EL1 via CPU registers (x0-x7) v4
2015-04-13 17:33:20 +01:00
danh-arm 620b5be9e9 Merge pull request #288 from danh-arm/sb/remove-arch-makefile
Remove the ARCH build configuration from the Makefile v2
2015-04-13 17:32:24 +01:00
danh-arm 9f64f7a4f7 Merge pull request #287 from danh-arm/sb/bl2-loading-errors
Panic if platform specific BL3-0 handling fails v2
2015-04-13 17:31:05 +01:00
Varun Wadekar 709a3c4707 Pass arguments/results between EL3/S-EL1 via CPU registers (x0-x7)
This patch removes the need for a shared buffer between the EL3 and S-EL1
levels. We now use the CPU registers, x0-x7, while passing data between
the two levels. Since TLK is a 32-bit Trusted OS, tlkd has to unpack the
arguments in the x0-x7 registers. TLK in turn gets these values via r0-r7.

Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2015-04-13 17:17:56 +01:00
Sandrine Bailleux d0687b2601 Remove the ARCH build configuration from the Makefile
The ARCH variable, which defaults to 'aarch64', gives the wrong
impression that the Trusted Firmware can be built for other
architectures. This patch removes it. This doesn't have any
consequence on the rest of the build system because the variable
was unused.

Change-Id: I97130f11f7733a3cbdfc89989587f2ebecaf3294
2015-04-13 17:14:43 +01:00
Sandrine Bailleux bcb79b9041 Panic if platform specific BL3-0 handling fails
The return value of bl2_plat_handle_bl30() used to be ignored.
This patch modifies the function load_bl30() so that it now
checks this return value and returns it to bl2_main().

This patch also unifies the error handling code across the
load_blx() functions so that they return a status code in all
cases and bl2_main() has the sole responsibility of panicking
if appropriate.

Change-Id: I2b26cdf65afa443b48c7da1fa7da8db956071bfb
2015-04-13 17:10:46 +01:00
danh-arm 9c7eecce72 Merge pull request #284 from kpet/kp/tf-issues-295
Add support to indicate size and end of assembly functions
2015-04-09 11:37:01 +01:00
Kévin Petit 8b779620d3 Add support to indicate size and end of assembly functions
In order for the symbol table in the ELF file to contain the size of
functions written in assembly, it is necessary to report it to the
assembler using the .size directive.

To fulfil the above requirements, this patch introduces an 'endfunc'
macro which contains the .endfunc and .size directives. It also adds
a .func directive to the 'func' assembler macro.

The .func/.endfunc have been used so the assembler can fail if
endfunc is omitted.

Fixes ARM-Software/tf-issues#295

Change-Id: If8cb331b03d7f38fe7e3694d4de26f1075b278fc
Signed-off-by: Kévin Petit <kevin.petit@arm.com>
2015-04-08 13:02:59 +01:00
danh-arm cd31914246 Merge pull request #277 from soby-mathew/sm/coh_lock_opt
Optimize the bakery lock implementation
2015-04-01 11:39:56 +01:00
danh-arm 099b605157 Merge pull request #279 from sandrine-bailleux/sb/fix-checkpatch
Bug Fix: Fix checkpatch rule in Makefile
2015-04-01 11:38:01 +01:00
danh-arm 874cd37f0b Merge pull request #280 from vwadekar/tlkd-fixed-v3
TLK dispatcher
2015-04-01 11:36:08 +01:00
Varun Wadekar 0a34d1e6df TLK-D documentation and add NVIDIA to the Acknowledgements file
Include TLK Dispatcher's documentation and add NVIDIA to the
Acknowledgements file. TLK is now a supported Trusted OS with
the Trusted Firmware.

Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2015-03-31 10:11:47 +05:30
Varun Wadekar 6693962c34 Open/Close TA sessions, send commands/events to TAs
This patch adds support to open/close secure sessions with Trusted
Apps and later send commands/events. Modify TLK_NUM_FID to indicate
the total number of FIDs available to the NS world.

Change-Id: I3f1153dfa5510bd44fc25f1fee85cae475b1abf1
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2015-03-31 10:11:17 +05:30
Varun Wadekar f9d2505497 Preempt/Resume standard function ID calls
This patch allows servicing of the non-secure world IRQs when the
CPU is in the secure world. Once the interrupt is handled, the
non-secure world issues the Resume FID to allow the secure payload
complete the preempted standard FID.

Change-Id: Ia52c41adf45014ab51d8447bed6605ca2f935587
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2015-03-31 10:09:51 +05:30
Varun Wadekar 6e159e7a8c Translate secure/non-secure virtual addresses
This patch adds functionality to translate virtual addresses from
secure or non-secure worlds. This functionality helps Trusted Apps
to share virtual addresses directly and allows the NS world to
pass virtual addresses to TLK directly.

Change-Id: I77b0892963e0e839c448b5d0532920fb7e54dc8e
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2015-03-31 10:06:51 +05:30
Varun Wadekar 77199df7bc Register NS shared memory for SP's activity logs and TA sessions
This patch registers NS memory buffer with the secure payload using
two different functions IDs - REGISTER_LOGBUF, REGISTER_REQBUF.

a. The SP uses the log-buffer to store its activity logs, in a
pre-decided format. This helps in debugging secure payload's issues.
b. The SP uses the req-buffer to get the parameters required by
sessions with Trusted Applications.

Change-Id: I6b0247cf7790524132ee0da24f1f35b1fccec5d5
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2015-03-31 10:06:15 +05:30
Varun Wadekar 220383153c Add TLK Dispatcher (tlkd) based on the Test Dispatcher (tspd)
TLK Dispatcher (tlkd) is based on the tspd and is the glue required
to run TLK as a Secure Payload with the Trusted Firmware.

Change-Id: I69e573d26d52342eb049feef773dd7d2a506f4ab
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2015-03-31 09:56:50 +05:30
Soby Mathew 548579f56e Remove the `owner` field in bakery_lock_t data structure
This patch removes the `owner` field in bakery_lock_t structure which
is the data structure used in the bakery lock implementation that uses
coherent memory. The assertions to protect against recursive lock
acquisition were based on the 'owner' field. They are now done based
on the bakery lock ticket number. These assertions are also added
to the bakery lock implementation that uses normal memory as well.

Change-Id: If4850a00dffd3977e218c0f0a8d145808f36b470
2015-03-27 10:20:32 +00:00
Soby Mathew 1c9573a157 Optimize the bakery lock structure for coherent memory
This patch optimizes the data structure used with the bakery lock
implementation for coherent memory to save memory and minimize memory
accesses. These optimizations were already part of the bakery lock
implementation for normal memory and this patch now implements
it for the coherent memory implementation as well. Also
included in the patch is a cleanup to use the do-while loop while
waiting for other contenders to finish choosing their tickets.

Change-Id: Iedb305473133dc8f12126726d8329b67888b70f1
2015-03-27 10:20:32 +00:00
Sandrine Bailleux 662109a54b Bug Fix: Fix checkpatch rule in Makefile
The shell command used to list all files but the libc's ones
introduced in commit 95d5353c33 was incorrect. It was listing
subdirectories without referencing their parent directories.
This patch fixes it.

Also, the command used to invoke the checkpatch.pl script is now
printed when V=1.

Change-Id: Ie2f1e74f60d77e38c25e717cffa44ca03baec7b2
2015-03-26 15:55:34 +00:00
achingupta 7e2d659e13 Merge pull request #274 from sandrine-bailleux/sb/juno-r1
Add support for Juno r1 in the platform reset handler
2015-03-26 15:43:15 +00:00
achingupta 93713e7fb7 Merge pull request #273 from achingupta/ag/genfw-389
Set group status of PPIs and SGIs correctly on GICv3 systems
2015-03-26 15:42:28 +00:00
Sandrine Bailleux 9454d31602 Add support for Juno r1 in the platform reset handler
For Juno r0, the platform reset handler needs to:
 - Implement the workaround for defect #831273
 - Increase the L2 Data and Tag RAM latencies for Cortex-A57.

Defect #831273 does not affect Juno r1. Also, the default value
for the L2 Tag RAM latency for Cortex-A57 is suitable on Juno r1.
The L2 Data RAM latency for Cortex-A57 still needs to be
increased, though.

This patch modifies the Juno platform reset handler to detect
the board revision and skip the unnecessary steps on Juno r1.
The behaviour on Juno r0 is unchanged.

Change-Id: I27542917223e680ef923ee860900806ffcd0357b
2015-03-24 10:09:56 +00:00
Achin Gupta 8cfc3fd295 Set group status of PPIs and SGIs correctly on GICv3 systems
On a GICv2 system, the group status of PPIs and SGIs is set in the GICD_IGROUPR0
register. On a GICv3 system, if affinity routing is enabled for the non-secure
state, then the group status of PPIs and SGIs should be set in the GICR_IGROUPR0
register. ARM Trusted firmware sets the group status using the GICv2
sequence. On a GICv3 system, if the group status of an interrupt is set to Group
1 through a write to the GICD_IGROUPR0, then the GICR_IGROUPR0 is updated as
well.

The current sequence is incorrect since it first marks all PPIs and SGIs as
Group 1. It then clears the bits in GICD_IGROUPR0 corresponding to secure
interrupts to set their group status to Group 0. This operation is a no-op. It
leaves the secure generic timer interrupt (#29) used by the TSP marked as Group
1. This causes the interrupt to interfere with the execution of non-secure
software. Once an interrupt has been marked as Group 1, the GICR_IGROUPR0 should
be programmed to change its group status.

This patch rectifies this issue by setting the group status of only the
non-secure PPI and SGIs to Group 1 in the first place. GICD_IGROUPR0 resets to
0. So secure interrupts are marked as Group 0 by default.

Change-Id: I958b4b15f3e2b2444ce4c17764def36216498d00
2015-03-20 08:52:13 +00:00
danh-arm 27a51c7248 Merge pull request #270 from vikramkanigiri/vk/a72_cpu_support
Add support for ARM Cortex-A72 processor
2015-03-19 19:33:06 +00:00
Vikram Kanigiri 1ba93aeb89 Add support for ARM Cortex-A72 processor
This patch adds support for ARM Cortex-A72 processor in the CPU
specific framework.

Change-Id: I5986855fc1b875aadf3eba8c36e989d8a05e5175
2015-03-18 12:09:17 +00:00
danh-arm 3b982be3b3 Merge pull request #263 from jcastillo-arm/jc/tbb_sha256_int
TBB: remove PolarSSL SHA1 functions from the binary
2015-03-17 14:47:05 +00:00
danh-arm 541d788175 Merge pull request #269 from vikramkanigiri/vk/common-cci
Common driver for ARM cache coherent Interconnects
2015-03-17 14:28:48 +00:00
danh-arm 27bc010666 Merge pull request #268 from vikramkanigiri/vk/move_init_cpu_ops
Initialise cpu ops after enabling data cache
2015-03-17 14:23:46 +00:00
danh-arm 09c731ebd6 Merge pull request #267 from sandrine-bailleux/sb/doc-fixes
Documentation fixes in 'make help' message and User Guide
2015-03-17 14:22:15 +00:00
danh-arm 007f54b6db Merge pull request #266 from sandrine-bailleux/sb/juno-disable-errata-806969
Juno: Disable workaround for Cortex-A57 erratum #806969
2015-03-17 14:20:29 +00:00
danh-arm 0f4970114b Merge pull request #264 from jcastillo-arm/jc/tbb_fip_dep
TBB: fix build target 'all' dependency on certificates
2015-03-17 14:19:48 +00:00
danh-arm 420c524249 Merge pull request #262 from sandrine-bailleux/sb/check-format-printf
Enable type-checking of arguments passed to printf() et al.
2015-03-17 14:18:09 +00:00
danh-arm 1ab2e90240 Merge pull request #265 from jcastillo-arm/jc/git_commit_id
checkpatch: ignore GIT_COMMIT_ID
2015-03-17 14:16:11 +00:00
Vikram Kanigiri 4991ecdc50 Use ARM CCI driver on FVP and Juno platforms
This patch updates the FVP and Juno platform ports to use the common
driver for ARM Cache Coherent Interconnects.

Change-Id: Ib142f456b9b673600592616a2ec99e9b230d6542
2015-03-16 18:37:59 +00:00
Vikram Kanigiri 23e47ede20 Common driver for ARM Cache Coherent Interconnects
Even though both CCI-400 and CCI-500 IPs have different configurations
with respect to the number and types of supported interfaces, their
register offsets and programming sequences are similar. This patch
creates a common driver for enabling and disabling snoop transactions
and DVMs with both the IPs.

New platform ports which implement one of these IPs should use this
common driver. Existing platform ports which implement CCI-400 should
migrate to the common driver as the standalone CCI-400 will be
deprecated in the future.

Change-Id: I3ccd0eb7b062922d2e4a374ff8c21e79fa357556
2015-03-16 18:37:47 +00:00
Vikram Kanigiri a7e98ad514 Add macro to calculate number of elements in an array
This patch defines the ARRAY_SIZE macro for calculating number of elements
in an array and uses it where appropriate.

Change-Id: I72746a9229f0b259323972b498b9a3999731bc9b
2015-03-16 18:37:34 +00:00
Vikram Kanigiri 12e7c4ab0b Initialise cpu ops after enabling data cache
The cpu-ops pointer was initialized before enabling the data cache in the cold
and warm boot paths. This required a DCIVAC cache maintenance operation to
invalidate any stale cache lines resident in other cpus.

This patch moves this initialization to the bl31_arch_setup() function
which is always called after the data cache and MMU has been enabled.

This change removes the need:
 1. for the DCIVAC cache maintenance operation.
 2. to initialise the CPU ops upon resumption from a PSCI CPU_SUSPEND
    call since memory contents are always preserved in this case.

Change-Id: Ibb2fa2f7460d1a1f1e721242025e382734c204c6
2015-03-13 10:38:09 +00:00
Juan Castillo 9b4ee6b3e3 checkpatch: ignore GIT_COMMIT_ID
By default, the checkpatch script requires that commit references
included in commit messages follow a predefined format. Github
merge commits do not follow this convention, causing the code
style test to fail when a new pull request is created.

This patch adds the ignore GIT_COMMIT_ID option to the checkpatch
parameters. This flag indicates the tool to ignore the commit
message format.

Change-Id: I37133cc5cf803f664b8ff00f62d458b39f06918c
2015-03-11 15:45:59 +00:00
Sandrine Bailleux 9cda6a945f Juno: Disable workaround for Cortex-A57 erratum #806969
Cortex-A57 erratum #806969 applies to revision r0p0 of the CPU
but does not manifest itself on Juno r0. It is not applicable
to Juno r1 in any case.

This patch modifies the Juno platform Makefile to no longer
compile this erratum workaround in.

Change-Id: I32b16835b2ac897e639e869ab2b78b62a51a0139
2015-03-11 12:41:03 +00:00
Juan Castillo 81ee098327 TBB: remove PolarSSL SHA1 functions from the binary
Commit ea4ec3aad5 ("TBB: use SHA256 to generate the certificate
signatures") updated the cert_create tool to generate the
signatures using SHA256 instead of SHA1. Therefore, SHA1 is no
longer required.

This patch removes the SHA1 option from the PolarSSL configuration
file. The source file sha1.c is no longer needed and has been
excluded from the build. The SHA1 functions are no longer included
in the binary, reducing the memory footprint of BL1 and BL2 by
approximately 6 KB.

Change-Id: I72ea2cff03c0964c3eaadce148ec2ad2c6dde2e3
2015-03-11 11:44:15 +00:00
Sandrine Bailleux 4da85bb06e User guide: Add dependency on libssl-dev for cert_create tool
The 'libssl-dev' package must be installed on the host to build the
certificate generation tool. This patch adds it to the list of
required tools in the User Guide.

Change-Id: I018381fb14b7c2d2bd6f2b7929aaad0571f7eb2e
2015-03-10 11:14:21 +00:00
Sandrine Bailleux 1b57859651 Update help message printed by the Makefile
The message printed by 'make help' is incomplete. It doesn't
mention all relevant supported targets. This patch updates it.

The format of the first line of the help message has been changed
so that it no longer lists all supported targets. This eases the
maintenance as we don't need to update the list in 2 places
anymore whenever a new target is added.

Also add a reference to the user guide to get the list of
supported options.

Change-Id: I79d8b815b0ffc0c43b4c05124378fce0e938365c
2015-03-10 11:14:21 +00:00
Sandrine Bailleux dad25049ce Enable type-checking of arguments passed to printf() et al.
This patch modifies the declarations of the functions printf() et al.
and adds the right GCC attribute to request the compiler to check
the type of the arguments passed to these functions against the given
format string. This will ensure that the compiler outputs warning
messages like the following whenever it detects an inconsistency:

 file.c:42: warning: format ‘%d’ expects type ‘int’, but argument 3 has type ‘long int’

It also fixes the type mismatch inconsistencies that it revealed
across the code base.

NOTE: THIS PATCH MAY FORCE PLATFORM PORTS OR SP/SPDS THAT USE THE
PRINTF FAMILY OF FUNCTIONS TO FIX ANY TYPE MISMATCH INCONSISTENCIES.

Change-Id: If36bb54ec7d6dd2cb4791d89b02a24ac13fd2df6
2015-03-06 13:07:43 +00:00
danh-arm b5b12347ab Merge pull request #260 from jcastillo-arm/jc/tbb_sha256
TBB: use SHA256 to generate the certificate signatures
2015-03-06 12:28:59 +00:00
Juan Castillo ea4ec3aad5 TBB: use SHA256 to generate the certificate signatures
This patch replaces SHA1 by SHA256 in the 'cert_create' tool, so
certificate signatures are generated according to the NSA Suite B
cryptographic algorithm requirements.

Documentation updated accordingly.

Change-Id: I7be79e6b2b62dac8dc78a4f4f5006e37686bccf6
2015-03-05 16:40:07 +00:00
Juan Castillo 85cdfdb25c TBB: fix build target 'all' dependency on certificates
Build target 'all' fails when GENERATE_COT=1 and no BL3-3 or
BL3-0 (if required) images are specified. The reason is that,
when GENERATE_COT=1, a dependency on the certificates is added
to the target 'all', and the certificates depend on the BL3-3
and BL3-0 images, causing the build process to fail if the
images are not specified.

This patch moves the dependency on the certificates from 'all' to
'fip'. Target 'all' may be used to build the individual images.
The certificates will be created by calling the target 'fip', where
BL3-3 and BL3-0 (if required) must be specified.

Change-Id: I870beb4e8f9f1bfad1d35b09c850a7ce3c9f4ec6
2015-03-05 16:37:33 +00:00
danh-arm 5930eadbe5 Merge pull request #261 from sandrine-bailleux/sb/coding-style
Ignore C library files when checking coding style
Fix violations to the coding style
2015-03-05 15:02:41 +00:00
Sandrine Bailleux ba592e2802 Fix violations to the coding style
All coding style violations have been fixed in a previous patch and
since then, each individual patch has been checked in this regard.
However, the latest version of the checkpatch.pl script from the Linux
kernel is more advanced and it is able to flag new errors in the
Trusted Firmware codebase. This patch fixes them.

Change-Id: I1f332f2440984be85d36b231bb83260368987077
2015-03-05 12:02:07 +00:00