Commit Graph

13 Commits

Author SHA1 Message Date
Ronak Jain 223a6284b8 feat(zynqmp): add feature check support
This API returns version of supported APIs.

Here, there are three cases to check API version by using feature
check implementation.

1. Completely implemented in TF-A: I mean the EEMI APIs which are
completely implemented in the TF-A only. So check those IDs and
return appropriate version for the same. Right now, it is base
version.

2. Completely implemented in firmware: I mean the EEMI APIs which are
completely implemented in the firmware only. Here, TF-A only passes
Linux request to the firmware to get the version of supported API. So
check those IDs and send request to firmware to get the version and
return to Linux if the version is supported or return the error code
if the feature is not supported.

3. Partially implemented (Implemented in TF-A and firmware both):
First check dependent EEMI API version with the expected version in
the TF-A. If the dependent EEMI API is supported in firmware then
return its version and check with the expected version in the TF-A.
If the version matches then check for the actual requested EEMI API
version. If the version is supported then return version of API
implemented in TF-A.

Signed-off-by: Ronak Jain <ronak.jain@xilinx.com>
Change-Id: I73f20d8222c518df1cda7879548b408b130b5b2e
2022-03-02 22:10:26 -08:00
Rajan Vaja 76ff8c459e feat(zynqmp): pass ioctl calls to firmware
Firmware supports new IOCTL for different purposes. To avoid
maintaining new IOCTL IDs in ATF, pass IOCTL call to firmware
for IOCTL IDs implemented in firmware.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Ronak Jain <ronak.jain@xilinx.com>
Change-Id: Ie14697c8da9581b0f695f4d33f05161ece558385
2022-03-02 22:09:33 -08:00
Ronak Jain 578f468ac0 feat(plat/xilinx/zynqmp): add support for runtime feature config
Add support for runtime feature configuration which are running on the
 firmware. Add new IOCTL IDs like IOCTL_SET_FEATURE_CONFIG and
 IOCTL_GET_FEATURE_CONFIG for configuring the features.

Signed-off-by: Ronak Jain <ronak.jain@xilinx.com>
Change-Id: I976aef15932783a25396b2adeb4c8f140cc87e79
2021-08-18 22:27:05 -07:00
Ronak Jain 38c0b2521a feat(plat/xilinx/zynqmp): sync IOCTL IDs
Sync IOCTL IDs in order to avoid conflict with other components like,
 Linux and firmware. Hence assigning value to IDs to make it more
 specific.

Signed-off-by: Ronak Jain <ronak.jain@xilinx.com>
Change-Id: I11ae679fbd0a953290306b62d661cc142f50dc28
2021-08-18 22:23:29 -07:00
Antonio Nino Diaz c3cf06f1a3 Standardise header guards across codebase
All identifiers, regardless of use, that start with two underscores are
reserved. This means they can't be used in header guards.

The style that this project is now to use the full name of the file in
capital letters followed by 'H'. For example, for a file called
"uart_example.h", the header guard is UART_EXAMPLE_H.

The exceptions are files that are imported from other projects:

- CryptoCell driver
- dt-bindings folders
- zlib headers

Change-Id: I50561bf6c88b491ec440d0c8385c74650f3c106e
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-11-08 10:20:19 +00:00
Siva Durga Prasad Paladugu 6ad42b989d zynqmp: pm_service: Add support for writing to AFI registers
Add support for writing to AFI registers.
So that after writing a bitstream the interface can be programmed.

Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
Signed-off-by: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
2018-09-04 17:30:15 +05:30
Siva Durga Prasad Paladugu 9a2850e5fa zynqmp: pm: Add IOCTL to set boot health status
Since the MMIO read/write APIs are removed from Linux user space,
Linux cannot directly write to the Global General Storage Register 4
any more to set healthy boot status.

Create an IOCTL to allow Linux to set boot health status.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Acked-by: Will Wong <willw@xilinx.com>
2018-09-04 17:12:51 +05:30
Siva Durga Prasad Paladugu 7c0b17e34b zynqmp: pm_service: Add support for resetting ULPI transceiver
To make ULPI transceiver work, a HIGH - LOW - HIGH pulse needs
to be given to resetb pin of ULPI chip. In ZYNQMP, this resetb
pin is being driven by BOOT MODE PIN 1. The BOOT MODE PIN's
are controlled by BOOT_PIN_CTRL register present in CRL_APB
address region. Since CRL_APB can be resticted to secure access,
this pin should be controlled by ATF.

This patch adds the support for the same.

Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
2018-09-04 17:03:25 +05:30
Jolly Shah 37e1a68e58 zynqmp: pm: Minor corrections for MISRA compliance
Various changes to comply with MISRA static analysis rules

Signed-off-by: Jolly Shah <jollys@xilinx.com>
2018-03-15 10:28:29 -07:00
Rajan Vaja 63eb7a367d zynqmp: pm: Add IOCTLs for global storage access
Add IOCTLs to read/write global general storage and
persistent global general storage registers access.

Signed-off-by: Rajan Vaja <rajanv@xilinx.com>
Signed-off-by: Jolly Shah <jollys@xilinx.com>
2018-03-15 10:23:49 -07:00
Rajan Vaja caae497dfc zynqmp: pm: Add clock control EEMI API and ioctl functions
These are empty functions with no logic right now. Code
will be added in subsequent commits.

Signed-off-by: Rajan Vaja <rajanv@xilinx.com>
Signed-off-by: Jolly Shah <jollys@xilinx.com>
2018-03-15 10:23:41 -07:00
Rajan Vaja 1818c02925 zynqmp: pm: Implement IOCTL APIs for device control
Implement ioctl APIs which uses MMIO operations
to configure devices. Below IOCTLs are supported
in this patch:
  * Set tap delay bypass
  * Set SGMII mode
  * SD reset
  * Set SD/MMC tap delay

Signed-off-by: Rajan Vaja <rajanv@xilinx.com>
Signed-off-by: Jolly Shah <jollys@xilinx.com>
2018-03-15 10:23:36 -07:00
Rajan Vaja f76918a806 zynqmp: pm: Implement IOCTL APIs for remoteproc
Implement ioctl APIs which uses MMIO operations
to control RPU operations. Below IOCTLs are supported
in this patch:
  * Get RPU operation mode
  * Set RPU operation mode
  * Configure RPU boot address (OCM/TCM)
  * Configure TCM combined mode

Signed-off-by: Rajan Vaja <rajanv@xilinx.com>
Signed-off-by: Jolly Shah <jollys@xilinx.com>
2018-03-15 10:23:31 -07:00