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4 Commits

Author SHA1 Message Date
Jiafei Pan cd960f5009 feat(lx2): enable DDR erratas for lx2 platforms 
Enable DDR erratas for lx2 platforms.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Ia2cf6ed077acf81882247153ec38bda708a6f007
 2022-03-27 23:24:24 +08:00
Jiafei Pan e4d0fa0b25 refactor(plat/nxp/lx216x): refine variable definition 
This patch will make BL2_BASE to be hex valaue but
not a shell command.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Iebb86a0b9bc8cab1676bd8e898cf4a1b6d16f472
 2021-06-25 17:18:26 +08:00
Jiafei Pan 96e63ccf20 refactor(plat/nxp/lx216x): use common make variables 
Some build variables have already defined in common
make helper file, use them directly.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I7fe6331160bfdf315924d4498d78b0a399eb2e89
 2021-06-25 16:51:12 +08:00
Pankaj Gupta 87056d3193 nxp: adding support of soc lx2160a 
* NXP SoC is 16 A-72 core SoC.
* SoC specific defines are defined in:
  - soc.def
  - soc.h
* Called for BL2 and BL31 setup, SoC specific setup are implemented in:
  - soc.c
* platform specific helper functions implemented at:
  - aarch64/lx2160a_helpers.S
* platform specific functions used by 'plat/nxp/commpon/psci',
  etc. are implemented at:
  - aarch64/lx2160a.S
* platform specific implementation for handling PSCI_SYSTEM_RESET2:
  - aarch64/lx2160a_warm_rst.S

Signed-off-by: rocket <rod.dorris@nxp.com>
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Change-Id: Ib40086f9d9079ed9b22967baff518c6df9f408b8
 2021-03-24 09:49:32 +05:30