Commit Graph

6 Commits

Author SHA1 Message Date
Achin Gupta 35ca35119d Add support for BL3-2 in BL3-1
This patch adds the following support to the BL3-1 stage:

1. BL3-1 allows runtime services to specify and determine the security
   state of the next image after BL3-1. This has been done by adding
   the `bl31_set_next_image_type()` & `bl31_get_next_image_type()`
   apis. The default security state is non-secure. The platform api
   `bl31_get_next_image_info()` has been modified to let the platform
   decide which is the next image in the desired security state.

2. BL3-1 exports the `bl31_prepare_next_image_entry()` function to
   program entry into the target security state. It uses the apis
   introduced in 1. to do so.

3. BL3-1 reads the information populated by BL2 about the BL3-2 image
   into its internal data structures.

4. BL3-1 introduces a weakly defined reference `bl32_init()` to allow
   initialisation of a BL3-2 image. A runtime service like the Secure
   payload dispatcher will define this function if present.

Change-Id: Icc46dcdb9e475ce6575dd3f9a5dc7a48a83d21d1
2014-02-20 19:06:34 +00:00
Harry Liebel 4f6036834f Do not trap access to floating point registers
Traps when accessing architectural features are disabled by clearing bits
in CPTR_EL3 during early boot, including accesses to floating point
registers. The value of this register was previously undetermined, causing
unwanted traps to EL3. Future EL3 code (for example, context save/restore
code) may use floating point registers, although they are not used by current
code.

Also, the '-mgeneral-regs-only' flag is enabled in the GCC settings to
prevent generation of code that uses floating point registers.

Change-Id: I9a03675f6387bbbee81a6f2c9ccf81150db03747
2014-01-17 10:27:53 +00:00
Dan Handley e83b0cadc6 Update year in copyright text to 2014
Change-Id: Ic7fb61aabae1d515b9e6baf3dd003807ff42da60
2014-01-17 10:27:53 +00:00
Dan Handley ab2d31edbd Enable third party contributions
- Add instructions for contributing to ARM Trusted Firmware.

- Update copyright text in all files to acknowledge contributors.

Change-Id: I9311aac81b00c6c167d2f8c889aea403b84450e5
2013-12-05 11:34:09 +00:00
Sandrine Bailleux 3738274dc1 Unmask SError and Debug exceptions.
Any asynchronous exception caused by the firmware should be handled
in the firmware itself.  For this reason, unmask SError exceptions
(and Debug ones as well) on all boot paths.  Also route external
abort and SError interrupts to EL3, otherwise they will target EL1.

Change-Id: I9c191d2d0dcfef85f265641c8460dfbb4d112092
2013-11-27 15:31:06 +00:00
Achin Gupta 4f6ad66ae9 ARMv8 Trusted Firmware release v0.2 2013-10-25 09:37:16 +01:00