Commit Graph

10040 Commits

Author SHA1 Message Date
Daniel Boulby 97215e0f25 refactor(el3-runtime): add prepare_el3_entry func
In the next patch we add an extra step of setting the PSTATE
registers to a known state on el3 entry. In this patch we create
the function prepare_el3_entry to wrap the steps needed for before
el3 entry. For now this is only save_gp_pmcr_pauth_regs.

Change-Id: Ie26dc8d89bfaec308769165d2649e84d41be196c
Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>
2022-01-31 11:27:11 +00:00
Bipin Ravi 50e06da16e Merge "feat(cpu): add library support for Poseidon CPU" into integration 2022-01-28 17:06:03 +01:00
Madhukar Pappireddy a5e8c22233 Merge "feat(st-regulator): add support for regulator-always-on" into integration 2022-01-28 16:20:08 +01:00
Pascal Paillet 9b4ca70d97 feat(st-regulator): add support for regulator-always-on
Add support for regulator-always-on at BL2 level as it was supported
before using the regulator framework.

Signed-off-by: Pascal Paillet <p.paillet@st.com>
Change-Id: Idb2f4ddc2fdd4e0d31fb33da87c84618aa2e5135
2022-01-28 14:18:12 +01:00
Manish Pandey 0562c71d4e Merge "fix(stm32mp1-fdts): remove mmc1 alias if not needed" into integration 2022-01-28 12:15:46 +01:00
Jayanth Dodderi Chidanand 1471475516 feat(cpu): add library support for Poseidon CPU
This patch adds the basic CPU library code to support the Poseidon CPU
in TF-A. Poseidon is derived from HunterELP core, an implementation of
v9.2 architecture. Currently, Hunter CPU the predecessor to HunterELP,
is supported in TF-A. Accordingly the Hunter CPU library code has been
as the base and adapted here.

Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
Change-Id: I406b4de156a67132e6a5523370115aaac933f18d
2022-01-28 11:12:21 +00:00
Manish Pandey 9afa5a9e54 Merge "docs(changelog): add some missing ST drivers" into integration 2022-01-28 12:08:07 +01:00
Yann Gautier a0e972438b fix(stm32mp1-fdts): remove mmc1 alias if not needed
If a board declares an mmc1 alias in its DT and is compiled without flags
STM32MP_EMMC or STM32MP_SDMMC, the DT will fail to build.
Add /delete-property/ mmc1; to correct this.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I1938ff99dc3d883f9174ee886f9ffa195ec60373
2022-01-28 11:26:52 +01:00
Yann Gautier 27254d9caf docs(changelog): add some missing ST drivers
Some of the ST drivers were not listed, and had no scopes. Add BSEC,
Crypto, DDR, I2C, FMC, GPIO, Regulator, Reset, SPI and Watchdog.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I4441f160f778d4bf7686e24e7d2d3c8330891327
2022-01-28 10:50:03 +01:00
Manish Pandey 24ce8d134a Merge "fix(nxp-drivers): ddr: corrects mapping of HNFs nodes" into integration 2022-01-27 23:05:51 +01:00
Manish Pandey e672698ce7 Merge changes from topic "st-clk-updates" into integration
* changes:
  refactor(st-clock): update STGEN management
  feat(st-clock): assign clocks to the correct BL
  feat(st-clock): do not refcount on non-secure clocks in bl32
  feat(st-clock): define secure and non-secure gate clocks
  refactor(stm32mp1): remove unused refcount helper functions
  fix(stm32mp1): add missing debug.h
  refactor(st-clock): use refcnt instead of secure status
2022-01-27 22:56:07 +01:00
Lionel Debieve 591d80c8b1 refactor(st-clock): update STGEN management
Rework STGEN config function, and move it to stm32mp_clkfunc.c file.

Change-Id: I7784a79c486d1b8811f6f8d123e49ea34899e9b6
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2022-01-27 18:06:36 +01:00
Yann Gautier 7418cf3979 feat(st-clock): assign clocks to the correct BL
Some clocks are only required in BL2, like boot devices clocks:
FMC, QSPI.
Some clocks are only used in BL32: Timers, devices that need special
care for independent reset.

Change-Id: Id4ba99afeea5095f419a86f7dc6423192c628d82
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2022-01-27 18:06:36 +01:00
Yann Gautier 3d69149a7e feat(st-clock): do not refcount on non-secure clocks in bl32
This change removes reference counting support in clock gating
implementation for clocks that rely on non-secure only RCC resources.
As RCC registers are accessed straight by non-secure world for these
clocks, secure world cannot safely store the clock state and even
disabling such clock from secure world can jeopardize the non-secure
world clock management framework and drivers.

As a consequence, for such clocks, stm32_clock_enable() forces the clock
ON without any increment of a refcount and stm32_clock_disable() does
not disable the clock.

Change-Id: I0cc159b36a25dbc8676f05edf2668ae63c640537
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2022-01-27 18:06:36 +01:00
Yann Gautier aaa09b713c feat(st-clock): define secure and non-secure gate clocks
Array stm32mp1_clk_gate[] defines the clock resources. This change
add a secure attribute to the clock: secure upon RCC[TZEN] (SEC),
secure upon RCC[TZEN] and RCC[MCKPROT] (MKP) or always accessible
from non-secure (N_S).

At init, lookup clock tree to check if any of the secure clocks
is derived from PLL3 in which case PLL3 shall be secure.

Note that this change does not grow byte size of stm32mp1_clk_gate[].

Change-Id: I933d8a30007f3c72f755aa1ef6d7e6bcfabbfa9e
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2022-01-27 18:06:36 +01:00
Yann Gautier e1bfbf8ad3 refactor(stm32mp1): remove unused refcount helper functions
Remove stm32mp_incr_shrefcnt(), stm32mp_decr_shrefcnt(),
stm32mp_incr_refcnt() and stm32mp_decr_refcnt() that are unused.
The file is then just removed.

Change-Id: I09ee23c02317df5d8f71cbc355d3ed4a67ce2749
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2022-01-27 18:06:36 +01:00
Yann Gautier 356ed96118 fix(stm32mp1): add missing debug.h
Due to stm32mp_shres_helpers.h removal, the debug.h header is no more
included. It should then be added to stm32mp1_boot_device.c.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I397911ac05fdff464c010cf3b2e04320a781b4aa
2022-01-27 18:06:36 +01:00
Yann Gautier 2444d2314c refactor(st-clock): use refcnt instead of secure status
Rework the internal functions __stm32mp1_clk_enable/disable to check for
reference count instead of secure status for a clock.
Some functions now unused can be removed.

Change-Id: Ie4359110d7144229f85c961dcd5a019222c3fd25
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2022-01-27 18:06:07 +01:00
Madhukar Pappireddy 222eb8c7f9 Merge changes from topic "fwu-on-stm32mp1" into integration
* changes:
  feat(stm32mp1): add support for building the FWU feature
  feat(stm32mp1): add logic to pass the boot index to the Update Agent
  feat(stm32mp1): add support for reading the metadata partition
  feat(stm32mp1): add logic to select the images to be booted
  feat(stm32mp1): add GUID's for identifying firmware images to be booted
  feat(stm32mp1): add GUID values for updatable images
  feat(fwu): add platform hook for getting the boot index
  feat(fwu): simplify the assert to check for fwu init
  feat(fwu): add a function to pass metadata structure to platforms
  feat(partition): add a function to identify a partition by GUID
  feat(partition): copy the partition GUID into the partition structure
  feat(partition): make provision to store partition GUID value
  feat(partition): cleanup partition and gpt headers
  feat(fwu): add basic definitions for GUID handling
  feat(fwu): pass a const metadata structure to platform routines
  build(changelog): add a valid scope for partition code
2022-01-27 15:49:15 +01:00
Sughosh Ganu ad216c1066 feat(stm32mp1): add support for building the FWU feature
Add support for enabling the FWU multi bank boot feature on the
platform.

Currently, this feature is supported on the STM32MP157C-DK2 board,
which boots off a uSD card. Also, support has been enabled when
booting from a FIP image.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Change-Id: Ia69e858461e2daf599d41d66d7ff2ccae0c341c2
2022-01-27 18:09:02 +05:30
Sughosh Ganu ba02add9ea feat(stm32mp1): add logic to pass the boot index to the Update Agent
With the FWU Multi Bank update feature, the platform can boot from one
of multiple banks(partitions). Pass the value of bank from which the
platform has booted as boot index to the Update Agent. The Update
Agent will match this boot index value against the active_index field
in the metadata, and update the metadata if there is a mismatch.

Fow now, the mechanism to pass the boot index is platform specific. On
the STM32MP1 platform, the boot index value is passed through a
memorey mapped TAMP register on the SoC.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Change-Id: I0aa665ff9c1db95be8ae19ed8de6d866587d6850
2022-01-27 18:09:02 +05:30
Sughosh Ganu 0ca180f641 feat(stm32mp1): add support for reading the metadata partition
Add support for reading the FWU metadata partition. The metadata
partition stores information on the current active bank along with
information on all the FWU updatable images on the platform. This
information is then used to identify the image to be booted.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Change-Id: I66bc5ac718c21a49c504e698b5b1f5c4daed2d08
2022-01-27 18:09:02 +05:30
Sughosh Ganu 8dd755314f feat(stm32mp1): add logic to select the images to be booted
With the FWU multi bank boot feature enabled, the platform can boot
from one of the multiple banks(partitions) containing the firmware
images. The bank whose firmware components are to be booted is read
from the FWU metadata structure -- the image to be booted is thus
derived by reading the metadata.

Read the metadata and set the image spec of the corresponding image
type to point to the partition from which the image is to be booted.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Change-Id: I3dfdc7e9202859e917ec4e1f7d1855aad42c6b70
2022-01-27 18:09:02 +05:30
Sughosh Ganu 41bd8b9e2a feat(stm32mp1): add GUID's for identifying firmware images to be booted
Add GUID's for identifying the firmware image type. With the FWU
multi bank boot feature enabled, these GUID values are used to
identify the firmware image to be booted. This is done by matching
GUID values of images in the io policy table with the Image GUID value
that is read from the FWU metadata structure.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Change-Id: Id9751f02f95fc48ef68e4e3f9f0ddbf6d6319d3c
2022-01-27 18:09:02 +05:30
Sughosh Ganu 8d6b4764f3 feat(stm32mp1): add GUID values for updatable images
With the FWU multi bank feature enabled, the identification of
firmware image type is done using the image type GUID instead of
binary_type field.

Add GUID values for the FIP image which can be updated through
the FWU firmware update feature. The GUID values are used in
identifying the firmware images.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Change-Id: If7d9356aa8d2bb3fbcbc87100e6972f1a1862921
2022-01-27 18:09:02 +05:30
Sughosh Ganu 40c175e75b feat(fwu): add platform hook for getting the boot index
Add a platform hook for returning the boot index, i.e. the bank from
which the platform has booted the updatable firmware images. This
value will be passed to the Update Agent.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Change-Id: Ic7bef21071c48cfc7b69c50e89df9ff758d95b00
2022-01-27 18:09:02 +05:30
Sughosh Ganu 40b085bddf feat(fwu): simplify the assert to check for fwu init
Simplify the assert to check if the FWU subsystem has been initialised
in the fwu_is_trial_run_state function.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Change-Id: I428668470ebd4b67e68777a62d5732cb96841ab9
2022-01-27 18:09:02 +05:30
Sughosh Ganu 9adce87efc feat(fwu): add a function to pass metadata structure to platforms
Add a helper function to pass the metadata structure to the
platforms. Platforms can then read the metadata structure and pass the
boot index value, i.e. the bank(partition) from which the firmware
images were booted, to the Update Agent.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Change-Id: I571179b9baa0fbc4d0f08d7a6e3b50c0c7165c5c
2022-01-27 18:09:02 +05:30
Sughosh Ganu 3cb1065581 feat(partition): add a function to identify a partition by GUID
With the GPT partition scheme, a partition can be identified using
it's UniquePartitionGUID, instead of it's name. Add a function to
identify the partition based on this GUID value. This functionality is
useful in identification of a partition whose UniquePartitionGUID
value is known.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Change-Id: I543f794e1f7773f969968a6bce85ecca6f6a1659
2022-01-27 18:09:02 +05:30
Sughosh Ganu 7585ec4d36 feat(partition): copy the partition GUID into the partition structure
Copy the UniquePartitionGUID member of a GPT partition entry into the
partition_entry structure. This GUID is subsequently used to identify
the image to boot on a platform which supports multiple partitions of
firmware components using the FWU metadata structure.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Change-Id: I8b55a1ee7deb1353886fbd8ebde53055d677fee0
2022-01-27 18:09:02 +05:30
Sughosh Ganu 938e8a500a feat(partition): make provision to store partition GUID value
The FWU multi bank feature supports multiple partitions or banks of
firmware components, where a platform can support having an active and
a backup partition(bank) of firmware images to boot from. This feature
identifies the images in a given bank using image GUID's --
this GUID value corresponds to the UniquePartitionGUID value used to
uniquely identify a GPT partition.

To support identification of images, add a member to the
partition_entry structure to store the UniquePartitionGUID value of
the GPT partition entry. This value is subsequently used to select the
firmware image to boot in a multi partition setup.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Change-Id: I2d235467ce7a7f20ebc1cef4db09924a5282e714
2022-01-27 18:09:02 +05:30
Sughosh Ganu 2029f93009 feat(partition): cleanup partition and gpt headers
The EFI_NAMELEN macro has been moved to efi.h header. Get the macro
from efi.h. Use the struct efi_guid structure for declaring GUID
members in gpt.h

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Change-Id: I1c3a2605b9f857b9cf2dcfdaed4dc9d0a2cbf0f0
2022-01-27 18:09:02 +05:30
Sughosh Ganu 19d63df1af feat(fwu): add basic definitions for GUID handling
The FWU metadata structure uses GUID's to identify the updatable
firmware images. Add some basic helper functions and
macros that would be used for working with the GUID datatype.

With the FWU feature enabled, these would then be used for image
identification and booting of images from a particular
bank(partition).

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Change-Id: Ia54c0402d72b503d6abd1d94bc751cc14602cd39
2022-01-27 18:09:02 +05:30
Sughosh Ganu 6aaf257de4 feat(fwu): pass a const metadata structure to platform routines
The metadata structure copy is passed to the platform routine to set
the image source to boot the platform from. This is done by reading
the metadata structure. Pass the metadata as a read-only copy to the
routine -- the routine only needs to consume the metadata values and
should not be able to update the metadata fields.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Change-Id: I399cad99ab89c71483e5a32a1de0e22df304f8b0
2022-01-27 18:09:02 +05:30
Sughosh Ganu e1157ecdc4 build(changelog): add a valid scope for partition code
Add a valid scope for the partition code under the drivers directory.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Change-Id: I173ac45e4ccbc95566277dabef15dcd25533e097
2022-01-27 18:09:02 +05:30
Madhukar Pappireddy 0b1cfc2988 Merge "fix(st-ddr): add missing debug.h" into integration 2022-01-27 02:01:32 +01:00
Madhukar Pappireddy d6854cd1d9 Merge "refactor(stm32mp1): use a macro for header size" into integration 2022-01-27 01:58:50 +01:00
Madhukar Pappireddy dca5ce11bf Merge "refactor(ls1028a): fix header file group issue" into integration 2022-01-26 16:08:06 +01:00
Joanna Farley b618f5ed25 Merge changes from topic "ck/changelog" into integration
* changes:
  build(npm): mandate Node.js engine version
  docs(changelog): fix broken version bumping
  docs(changelog): fix version tag links
  refactor(hooks): replace cz-conventional-changelog with cz-commitlint
  style(commitlint): reorder header/body max line length fields
  chore(npm): update package versions/license
2022-01-26 12:08:31 +01:00
Maninder Singh e3a234971a fix(nxp-drivers): ddr: corrects mapping of HNFs nodes
Corrects mapping of HNFs nodes with SNFs nodes based on their
proximity in CCN508 ring when disabling unused ddr controller.

When DDRC 2 disabled and DDR 1 is active the mapping is 0x3/3/8/8/8/8/3/3.
When DDRC 1 is disabled and DDR2 is active the mapping is 0x
18/18/13/13/13/13/18/18 .

Signed-off-by: Maninder Singh <maninder.singh_1@nxp.com>
Signed-off-by: JaiPrakash Singh <JaiPrakash.singh@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I6ec1e02f8ad7e8bb8628913625ff5313a054dcc6
2022-01-26 10:19:08 +08:00
Jiafei Pan 40886d5ae0 refactor(ls1028a): fix header file group issue
ocram.h should be in platform includes group.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I43b6a279e48e1a173f8e7c601f2c8d48e6efc647
2022-01-26 10:13:14 +08:00
Sandrine Bailleux b19630037d Merge changes from topic "decouple-tb-mb" into integration
* changes:
  refactor(renesas): disable CRYPTO_SUPPORT option
  refactor(fvp): avoid Measured-Boot dependency on Trusted-Boot
  refactor(measured-boot): avoid Measured-Boot dependency on Trusted-Boot
  build: introduce CRYPTO_SUPPORT build option
2022-01-25 08:10:58 +01:00
Madhukar Pappireddy 24dc0a2891 Merge changes from topic "st_syscfg_updates" into integration
* changes:
  feat(stm32mp1): add helper to enable high speed mode in low voltage
  refactor(stm32mp1): add helpers for IO compensation cells
  feat(stm32mp1): use clk_enable/disable functions
  feat(stm32mp1): add timeout in IO compensation
2022-01-24 23:07:01 +01:00
Chris Kay 0501d48b81 build(npm): mandate Node.js engine version
This change mandates a particular version of Node.js when running
`npm install`. When using a version of Node.js that does not meet these
expectations, a warning will be emitted to the user to let them know
that they are using an unsupported version of Node.js

Change-Id: I3f9bcf8be483a80b5882d65b034c6655013df19f
Signed-off-by: Chris Kay <chris.kay@arm.com>
2022-01-24 12:55:34 +00:00
Chris Kay ba748f3c35 docs(changelog): fix broken version bumping
Standard Version was not bumping the package metadata files as it
should have been. It's not clear to me why, but there is an open
[GitHub issue][1] for documenting this behaviour.

[1]: https://github.com/conventional-changelog/standard-version/issues/506

Change-Id: Ie89a81272fe507a3d2e1cd33c6ac1bdcc8ac3d75
Signed-off-by: Chris Kay <chris.kay@arm.com>
2022-01-24 12:55:34 +00:00
Chris Kay c503b42c09 docs(changelog): fix version tag links
The Standard Version tool will not recognize a release header as a
release header without the minor version, and will overwrite them when
generating the next release changelog.

Additionally, it will not generate a link to the tag diff unless a tag
of the form `vX.Y.Z` exists. We ought to generate tags with this version
format in the future to ensure the diff links are generated.

Change-Id: I7864ab7a5822f83ddb7a7917208d2d029ae34729
Signed-off-by: Chris Kay <chris.kay@arm.com>
2022-01-24 12:55:34 +00:00
Chris Kay f64c55826e refactor(hooks): replace cz-conventional-changelog with cz-commitlint
This change replaces cz-conventional-changelog with cz-commitlint, which
automatically configures Commitizen using our commitlint configuration
file. Currently, we use some manual Javascript magic to load our
Commitizen configuration into commitlint (the opposite of what's
introduced by this change), which can be removed.

With this change, we also move our commitlint configuration into a
new `changelog.yaml` file. This file holds the same data as `.cz.json`
previously did.

Change-Id: I14ff2308f1a0b2b293c2128b28ca2df578ce9c1c
Signed-off-by: Chris Kay <chris.kay@arm.com>
2022-01-24 12:55:00 +00:00
Manish Pandey b57d9d6f29 Merge changes from topic "new_ls1043a" into integration
* changes:
  docs(maintainers): update nxp layerscape maintainers
  docs(plat/nxp/layerscape): add ls1043a soc and board support
  feat(plat/nxp/ls1043ardb): add ls1043ardb board support
  feat(plat/nxp/ls1043a): add ls1043a soc support
  refactor(plat/ls1043): remove old implementation for platform ls1043
  feat(nxp/driver/dcfg): add some macro definition
  fix(nxp/common/setup): increase soc name maximum length
  feat(nxp/common/errata): add SoC erratum a008850
  feat(nxp/driver/tzc380): add tzc380 platform driver support
  feat(tzc380): add sub-region register definition
  feat(nxp/common/io): add ifc nor and nand as io devices
  feat(nxp/driver/ifc_nand): add IFC NAND flash driver
  feat(nxp/driver/ifc_nor): add IFC nor flash driver
  feat(nxp/driver/csu): add bypass bit mask definition
  feat(nxp/driver/dcfg): add gic address align register definition
  feat(nxp/common/rcpm): add RCPM2 registers definition
  fix(nxp/common/setup): fix total dram size checking
  feat(nxp/common): add CORTEX A53 helper functions
2022-01-20 17:29:00 +01:00
Jiafei Pan d9bb9779fc docs(maintainers): update nxp layerscape maintainers
Added myself to be NXP common code and ls1028a, ls1043a platforms
maintainer.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Iadffc5600e9bb2e94b1d545b8dd1a819358cabcb
2022-01-20 23:38:03 +08:00
Jiafei Pan 168a20120b docs(plat/nxp/layerscape): add ls1043a soc and board support
Update document for nxp-layerscape to add ls1043a SoC and ls1043ardb
board support.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I8442daf08a0f7c1ba982a3ed1d0ad24c4c420185
2022-01-20 23:38:03 +08:00