Commit Graph

10705 Commits

Author SHA1 Message Date
Marc Bonnici a8be4cd057 feat(fvp): add plat hook for memory transactions
Add call to platform hooks upon successful transmission of a
memory transaction request and as part of a memory reclaim request.
This allows for platform specific functionality to be performed
accordingly.

Note the hooks must be placed in the initial share request and final
reclaim to prevent order dependencies with operations that may take
place in the normal world without visibility of the SPMC.

Add a dummy implementation to the FVP platform.

Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: I0c7441a9fdf953c4db0651512e5e2cdbc6656c79
2022-05-19 15:02:47 +01:00
Marc Bonnici 0560b53e71 feat(spmc): enable handling of the NS bit
In FF-A v1.1 the NS bit is used by the SPMC to specify the
security state of a memory region retrieved by a SP.

Enable the SPMC to set the bit for v1.1 callers or v1.0
callers that explicitly request the usage via FFA_FEATURES.

In this implementation the sender of the memory region must
reside in the normal world and the SPMC does not support
changing the security state of memory regions therefore
always set the NS bit if required by the caller.

Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: I215756b28e2382082933ba1dcc7584e7faf4b36b
2022-05-19 15:02:47 +01:00
Marc Bonnici 7e804f9695 feat(spmc): add support for v1.1 FF-A memory data structures
Add support for the FF-A v1.1 data structures to the EL3 SPMC
and enable the ability to convert between v1.0 and the v1.1
forwards compatible data structures.

The SPMC now uses the v1.1 data structures internally and will
convert descriptors as required depending on the FF-A version
supported by the calling partition.

Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: Ic14a95ea2e49c989aecf19b927a6b21ac50f863e
2022-05-19 15:02:46 +01:00
Marc Bonnici fef85e1e53 feat(spmc/mem): prevent duplicated sharing of memory regions
Allow the SPMC to reject incoming memory sharing/lending requests
that contain memory regions which overlap with an existing
request.

To enable this functionality the SPMC compares each requested
memory region to those in ongoing memory transactions and rejects
the request if the ranges overlap.

Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: I7588846f272ec2add2a341d9f24836c73a046e2f
2022-05-19 15:02:30 +01:00
Marc Bonnici f0244e5dd1 feat(spmc/mem): support multiple endpoints in memory transactions
Enable FFA_MEM_LEND and FFA_MEM_SHARE transactions to support multiple
borrowers and add the appropriate validation. Since we currently
only support a single S-EL1 partition, this functionality is to
support the use case where a VM shares or lends memory to one or
more VMs in the normal world as part of the same transaction to
the SP.

Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: Ia12c4357e9d015cb5f9b38e518b7a25b1ea2e30e
2022-05-19 15:02:26 +01:00
Achin Gupta 2e21921502 feat(spmc): add support for v1.1 FF-A boot protocol
A partition can request the use of the FF-A boot protocol via
an entry in its manifest along with the register (0-3)
that should be populated with a pointer to a data structure
containing boot related information. Currently the boot
information consists of an allocated memory region
containing the SP's manifest, allowing it to map and parse
any extra information as required.

This implementation only supports the v1.1 data structures
and will return an error if a v1.0 client requests the usage
of the protocol.

Signed-off-by: Achin Gupta <achin.gupta@arm.com>
Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: I67692553a90a7e7d94c64fe275edd247b512efca
2022-05-19 10:57:37 +01:00
Marc Bonnici 6a0788bc0e feat(plat/fvp): introduce accessor function to obtain datastore
In order to provide the EL3 SPMC a sufficient datastore to
record memory descriptors, a accessor function is used.
This allows for the backing memory to be allocated in a
platform defined manner, to accommodate memory constraints
and desired use cases.

Provide an implementation for the Arm FVP platform to
use a default value of 512KB memory allocated in the
TZC RAM section.

Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: I92bc55ba6e04bdad429eb52f0d2960ceda682804
2022-05-19 10:57:37 +01:00
Marc Bonnici e0b1a6d59e feat(spmc/mem): add FF-A memory management code
Originally taken from the downstream Trusty SPD [1]
implementation and modified to integrate with
the EL3 SPMC internals.

Add support to the EL3 SPMC for a subset of the FF-A
memory management ABIs:
- FFA_MEM_SHARE
- FFA_MEM_LEND
- FFA_MEM_RETRIEVE_REQ
- FFA_MEM_RETRIEVE_RESP
- FFA_MEM_RELINQUISH
- FFA_MEM_RECLAIM
- FFA_MEM_FRAG_RX
- FFA_MEM_FRAG_TX

This implementation relies on a datastore allocated in
platform specific code in order to store memory descriptors
about ongoing memory transactions. This mechanism
will be implemented in the following commit.

[1] https://android.googlesource.com/trusty/external/trusted-firmware-a/+/refs/heads/master/services/spd/trusty/

Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: Ib042f73c8a6e0f0aed00f6762be175cb9dedc042
2022-05-19 10:57:30 +01:00
Olivier Deprez b1470ccc92 Merge changes from topic "ffa_el3_spmc" into integration
* changes:
  feat(spmd): allow forwarding of FFA_FRAG_RX/TX calls
  feat(spmc): add support for FFA_SPM_ID_GET
  feat(spmc): add support for forwarding a secure interrupt to the SP
  feat(spmc): add support for FF-A power mgmt. messages in the EL3 SPMC
2022-05-16 12:32:27 +02:00
Olivier Deprez c8113bf77c Merge changes from topic "ffa_el3_spmc" into integration
* changes:
  feat(spmc): enable the SPMC to pass the linear core ID in a register
  feat(spmc): add FFA_RX_RELEASE handler
  feat(spmc): add FFA_RUN handler
  feat(spmc): support FFA_ID_GET ABI
  feat(spmc): add FFA_FEATURES handler
  feat(spmc): add FFA_PARTITION_INFO_GET handler
  feat(spmc): enable handling FF-A RX/TX Mapping ABIs
  docs(maintainers): introduce SPMC maintainer section
2022-05-16 12:05:59 +02:00
Marc Bonnici 642db98407 feat(spmd): allow forwarding of FFA_FRAG_RX/TX calls
Enable the SPMD to forward FFA_FRAG_RX/TX calls between
the normal world and the SPMC.

Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: I097a48552827a8527dd3efe1155bc601d7cbf887
2022-05-13 17:47:39 +01:00
Marc Bonnici 46872e01f5 feat(spmc): add support for FFA_SPM_ID_GET
Enable a Secure Partition to query the ID assigned to the SPMC.
The SPMD will take care of any calls from the normal world
therefore we should not need to handle this case in the SPMC.

Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: I97903e920e928df385addbb2d383f24e602bf2db
2022-05-13 17:47:39 +01:00
Madhukar Pappireddy a921da5ed2 Merge changes If2408af3,If485ff27 into integration
* changes:
  feat(versal): add SMCCC call TF_A_PM_REGISTER_SGI
  feat(versal): add support to reset SGI
2022-05-13 18:13:33 +02:00
Achin Gupta 729d7793f8 feat(spmc): add support for forwarding a secure interrupt to the SP
This patch adds support for forwarding a secure interrupt that
preempts the normal world to a SP for top-half interrupt handling.

Signed-off-by: Achin Gupta <achin.gupta@arm.com>
Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: Iaa6e96f4cf8922ba5b6d128a19359df15e44158d
2022-05-13 17:07:13 +01:00
Olivier Deprez 0dc2b51681 Merge changes from topic "ns/save_fpregs_context" into integration
* changes:
  feat(sgi): enable fpregs context save and restore
  feat(spm_mm): add support to save and restore fp regs
2022-05-13 17:28:58 +02:00
Marc Bonnici f0143004e5 feat(spmc): enable the SPMC to pass the linear core ID in a register
Add TF-A implementation defined behaviour to provide the linear core
ID in the x4 register when bringing up an SP.

Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: I6cb215841097b264d252ec0262b0b7272be99d41
2022-05-13 15:51:23 +01:00
Marc Bonnici 59bd2ad83c feat(spmc): add support for FF-A power mgmt. messages in the EL3 SPMC
This patch adds support for forwarding the following PSCI messages
received by the SPMC at EL3 to the S-EL1 SP if the SP has indicated
that it wishes to receive the appropriate message via its manifest.

1. A PSCI CPU_OFF message in response to a cpu hot unplug request
   from the OS.
2. A message to indicate warm boot of a cpu in response to a cpu
   hot plug request from the OS.
3. A PSCI CPU_SUSPEND message in response to a cpu idle event
   initiated from the OS.
4. A message to indicate warm boot of a cpu from a shallow power
   state in response to a cpu resume power event.

This patch also implements the FFA_SECONDARY_EP_REGISTER function to
enable the SP specify its secondary entrypoint.

Signed-off-by: Achin Gupta <achin.gupta@arm.com>
Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: I375d0655b2c6fc27445facc39213d1d0678557f4
2022-05-13 15:51:23 +01:00
Marc Bonnici f0c25a082f feat(spmc): add FFA_RX_RELEASE handler
Enable a partition to release its RX buffer and the SPMC
to update the appropriate state tracking.

Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: I5fb6d92244b5ed5f032269b29b102aa874bf3ae3
2022-05-13 15:51:23 +01:00
Marc Bonnici aad20c85cb feat(spmc): add FFA_RUN handler
Enable the SPMC to handle the FFA_RUN ABI and update
the state tracking accordingly.

Change-Id: I3e8a3fa3ec9b03830055d2fbd6124b8ff1ed4103
Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
2022-05-13 15:51:23 +01:00
Marc Bonnici d5fe92350c feat(spmc): support FFA_ID_GET ABI
Allow for a partition to retrieve its own partition ID.

Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: I1a19ac30b86736d818673c239b2f8fd2d6128c06
2022-05-13 15:51:23 +01:00
Marc Bonnici 55a296387b feat(spmc): add FFA_FEATURES handler
Enable the spmc to report the features that it currently supports.
Populated with the currently implemented functionality.

Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: I00e51ded284efd87cd50a0e9416dbc33f22ced85
2022-05-13 15:51:23 +01:00
Marc Bonnici f74e27723b feat(spmc): add FFA_PARTITION_INFO_GET handler
Enable the SPMC to handle calls to FFA_PARTITION_INFO_GET.
This allows the normal world to discover which partitions
are running in the secure world including logical partitions
in EL3.

This implementation supports both the v1.0 and v1.1
implementations of the Partition Info Get Descriptor.
The SPMC populates the appropriate descriptor in the
partitions RX buffer, if requested, according to the
version of FF-A that the caller is using.

Additionally rename the common/uuid UUID_H include guard
due to a conflict with another header file.

Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: I0a85f1dae50fae1fe47a3cafb765fbe9f40619e1
2022-05-13 15:51:23 +01:00
Marc Bonnici 1a752245ec feat(spmc): enable handling FF-A RX/TX Mapping ABIs
Enable handling of FFA_RXTX_MAP and FFA_RXTX_UNMAP ABIs
and ensure these buffers are mapped as required to allow
access by the SPMC.

Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: Ifc425f1ee16c90d1d95b6ae4ac9992d6f785227b
2022-05-13 15:51:21 +01:00
Sandrine Bailleux 6aed554954 Merge changes from topic "rss/mboot-attest" into integration
* changes:
  docs(maintainers): add PSA, MHU, RSS comms code owners
  feat(plat/arm/fvp): enable RSS backend based measured boot
  feat(lib/psa): mock PSA APIs
  feat(drivers/measured_boot): add RSS backend
  feat(drivers/arm/rss): add RSS communication driver
  feat(lib/psa): add initial attestation API
  feat(lib/psa): add measured boot API
  feat(drivers/arm/mhu): add MHU driver
2022-05-13 16:15:35 +02:00
Joanna Farley aa69de86f0 Merge changes I50721040,I1ce4b7b4,I9658aef7,I40ff55eb into integration
* changes:
  fix(intel): remove unused printout
  fix(intel): fix configuration status based on start request
  style(intel): align the sequence in header file
  fix(intel): remove redundant NOC header declarations
2022-05-13 14:29:24 +02:00
David Vincze c671daeeea docs(maintainers): add PSA, MHU, RSS comms code owners
Adding Sandrine Bailleux for the PSA APIs and myself for the
MHU and RSS comms drivers as code owner.

Change-Id: Ib948479cc6e46163aae59c938877a2d0bcf91754
Signed-off-by: David Vincze <david.vincze@arm.com>
2022-05-13 11:20:05 +02:00
Sieu Mun Tang 0d19eda0dd fix(intel): remove unused printout
This patch is to remove unused printout.

Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I507210402dcbaf8369209308ae1fcedaccb0292d
2022-05-13 16:46:25 +08:00
Sieu Mun Tang 673afd6f8e fix(intel): fix configuration status based on start request
This patch is to fix configuration status command now returns
the result based on the last config start command made to the
runtime software. The status type can be either:
- NO_REQUEST (default)
- RECONFIGURATION
- BITSTREAM_AUTH

Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I1ce4b7b4c741d88de88778f8fbed7dfe83a39fbc
2022-05-13 16:46:20 +08:00
Sieu Mun Tang 762c34a85d style(intel): align the sequence in header file
This patch is to align the sequence of function in header file.

Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I9658aef78b06b744c6c14f95b2821daf5dbb0082
2022-05-13 16:46:17 +08:00
Sieu Mun Tang 58690cd629 fix(intel): remove redundant NOC header declarations
This patch is to remove redundant NOC declarations in
system manager header file. The NOC headers are shareable
across both Stratix 10 and Agilex platforms.

Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I40ff55eb1d8fe280db1d099d5d1a3c2bf4b4b459
2022-05-13 16:46:12 +08:00
Tanmay Shah fcf6f46931 feat(versal): add SMCCC call TF_A_PM_REGISTER_SGI
This call is used to register and reset SGI interrupt.
Before this functionality was performed using IOCTL_REGISTER_SGI
pm_ioctl EEMI call. It's not correct use of PM_IOCTL as it is
not EEMI functionality. Instead this new SMCCC call will be
handled by TF-A specific handler.

Change-Id: If2408af38b889d29a5c584e8eec5f1672eab4fb5
Signed-off-by: Tanmay Shah <tanmay.shah@xilinx.com>
2022-05-12 20:29:41 +02:00
Venkatesh Yadav Abbarapu bf70449ba2 feat(versal): add support to reset SGI
Add "reset" parameter in pm_register_sgi() to reset
SGI number. This will be required if OS wants to reset
SGI number to default state. Caller can reset param to
1 to reset SGI in ATF.

Change-Id: If485ff275df884f74eb67671cac7fa953458afe9
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Tanmay Shah <tanmay.shah@xilinx.com>
2022-05-12 20:29:03 +02:00
Madhukar Pappireddy 15e498de74 Merge "fix(security): workaround for CVE-2022-23960" into integration 2022-05-12 20:24:10 +02:00
Madhukar Pappireddy 1d41fffff7 Merge "docs(versal): fix the versal platform emu name" into integration 2022-05-12 16:49:36 +02:00
Madhukar Pappireddy b57ccdf918 Merge "fix(errata): workaround for DSU-110 erratum 2313941" into integration 2022-05-12 16:34:40 +02:00
Madhukar Pappireddy 868f9768bb Merge changes Ie9451e35,I1815deeb,If277b2b3,Ie2ceaf24,I7996d505, ... into integration
* changes:
  fix(intel): add flash dcache after return response for INTEL_SIP_SMC_MBOX_SEND_CMD
  fix(intel): extending to support large file size for SHA2/HMAC get digest and verifying
  fix(intel): extending to support large file size for SHA-2 ECDSA data signing and signature verifying
  fix(intel): extending to support large file size for AES encryption and decryption
  feat(intel): support version 2 SiP SVC SMC function ID for mailbox commands
  feat(intel): support version 2 SiP SVC SMC function ID for non-mailbox commands
  fix(intel): update certificate mask for FPGA Attestation
  feat(intel): update to support maximum response data size
  feat(intel): support ECDSA HASH Verification
  feat(intel): support ECDSA HASH Signing
  feat(intel): support ECDH request
  feat(intel): support ECDSA SHA-2 Data Signature Verification
  feat(intel): support ECDSA SHA-2 Data Signing
  feat(intel): support ECDSA Get Public Key
  feat(intel): support session based SDOS encrypt and decrypt
  feat(intel): support AES Crypt Service
  feat(intel): support HMAC SHA-2 MAC verify request
  feat(intel): support SHA-2 hash digest generation on a blob
  feat(intel): support extended random number generation
  feat(intel): support crypto service key operation
  feat(intel): support crypto service session
  feat(intel): extend attestation service to Agilex family
  fix(intel): flush dcache before sending certificate to mailbox
  fix(intel): introduce a generic response error code
  fix(intel): allow non-secure access to FPGA Crypto Services (FCS)
  feat(intel): single certificate feature enablement
  feat(intel): initial commit for attestation service
  fix(intel): update encryption and decryption command logic
2022-05-12 16:19:15 +02:00
Madhukar Pappireddy 1f0309d498 Merge "fix(zynqmp): define and enable ARM_XLAT_TABLES_LIB_V1" into integration 2022-05-12 16:14:55 +02:00
Bipin Ravi c2a15217c3 fix(security): workaround for CVE-2022-23960
Implements the loop workaround for Cortex Makalu/Makalu-ELP/Hunter
and Neoverse Demeter/Poseidon.

Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: If5f6689b662ecac92491e0c0902df4270051ce5b
2022-05-11 19:05:48 +02:00
Bipin Ravi 7e3273e8e4 fix(errata): workaround for DSU-110 erratum 2313941
DSU-110 erratum 2313941 is a Cat B erratum and applies to revisions
r0p0, r1p0, r2p0, r2p1, r3p0, r3p1 and is still open.

The workaround sets IMP_CLUSTERACTLR_EL1[16:15] bits to 0b11 to disable
clock gating of the SCLK domain. This will increase the idle power
consumption.

This patch applies the fix for Cortex-X2/A510/A710 and Neoverse N2.

SDEN can be found here:
https://developer.arm.com/documentation/SDEN1781796/latest

Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: I54d948b23e8e01aaf1898ed9fe4e2255dd209318
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
2022-05-11 19:05:36 +02:00
Nishant Sharma 18fa43f753 feat(sgi): enable fpregs context save and restore
This is required to prevent Nwd context corruption during StMM
execution.

Standalone MM uses OpenSSL for secure boot, which uses FP registers for
floating point calculations.

Signed-off-by: Nishant Sharma <nishant.sharma@arm.com>
Change-Id: I6ed11d4fa5d64c3089a24b66fd048a841c480792
2022-05-11 17:18:21 +01:00
Nishant Sharma 15dd6f19da feat(spm_mm): add support to save and restore fp regs
Add the support to save Nwd's floating point registers before switching
to SEL0 and then restore it after coming out of it. Emit a warning
message if SPM_MM is built with CTX_INCLUDE_FPREGS == 0

There is no need to save FP registers of SEL0 because secure partitions
run to completion.

This change is used to prevent context corruption if secure partition
enabled and Nwd decide to use floating point registers.

Signed-off-by: Nishant Sharma <nishant.sharma@arm.com>
Change-Id: I1eea16ea2311a4f00a806ea72c118752821b9abb
2022-05-11 17:18:21 +01:00
Madhukar Pappireddy 15ff61f5ce Merge changes from topic "fix_st_spi" into integration
* changes:
  fix(st-spi): remove SR_BUSY bit check before sending command
  fix(st-spi): always check SR_TCF flags in stm32_qspi_wait_cmd()
2022-05-11 17:31:44 +02:00
Madhukar Pappireddy bf61c4f0af Merge "docs: update release and code freeze dates" into integration 2022-05-11 17:16:48 +02:00
Bipin Ravi 401cb4bb76 Merge "fix(security): workaround for CVE-2022-23960 for Cortex-X1" into integration 2022-05-11 16:59:15 +02:00
Bipin Ravi c8c7c47bb3 Merge "fix(errata): workarounds for cortex-x1 errata" into integration 2022-05-11 16:59:00 +02:00
Bipin Ravi 123cebe5db Merge "feat(cpu): add support for Cortex-X1" into integration 2022-05-11 16:58:50 +02:00
Tamas Ban c44e50b725 feat(plat/arm/fvp): enable RSS backend based measured boot
Enable the RSS backend based measured boot feature.
In the absence of RSS the mocked version of PSA APIs
are used. They always return with success and hard-code data.

Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: I7543e9033a7a21f1b836d911d8d9498c6e09b956
2022-05-11 15:47:32 +02:00
Tamas Ban 0ce2072d9b feat(lib/psa): mock PSA APIs
Introduce PLAT_RSS_NOT_SUPPORTED build config to
provide a mocked version of PSA APIs. The goal is
to test the RSS backend based measured boot and
attestation token request integration on such
a platform (AEM FVP) where RSS is otherwise
unsupported. The mocked PSA API version does
not send a request to the RSS, it only returns
with success and hard-coded values.

Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: Ice8d174adf828c1df08fc589f0e17abd1e382a4d
2022-05-11 15:47:30 +02:00
Tamas Ban 0442ebd2e9 feat(drivers/measured_boot): add RSS backend
Runtime Security Subsystem (RSS) provides for the host:
- Runtime service to store measurments, which were
  computed by the host during measured boot.

Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: Ia9e4e8a1fe8f01a28da1fd8c434b780f2a08f94e
2022-05-11 15:47:02 +02:00
Tamas Ban ce0c40edc9 feat(drivers/arm/rss): add RSS communication driver
This commit adds a driver to conduct the AP's communication
with the Runtime Security Subsystem (RSS).
RSS is Arm's reference implementation for the CCA HES [1].
It can be considered as a secure enclave to which, for example,
certain services can be offloaded such as initial attestation.

RSS comms driver:
 - Relies on MHU v2.x communication IP, using a generic MHU API,
 - Exposes the psa_call(..) API to the upper layers.

[1] https://developer.arm.com/documentation/DEN0096/latest

Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Signed-off-by: David Vincze <david.vincze@arm.com>
Change-Id: Ib174ac7d1858834006bbaf8aad0eb31e3a3ad107
2022-05-11 15:47:02 +02:00