Commit Graph

8070 Commits

Author SHA1 Message Date
Lionel Debieve ea30694561 nand: raw_nand: fix timeout issue in nand_wait_ready
nand_wait_ready is called with a millisecond delay
but the timeout used a micro second. Fixing the conversion
in the timeout call.
The prototype of the function is also changed to use an unsigned int
parameter.

Change-Id: Ia3281be7980477dfbfdb842308d35ecd8b926fb8
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2020-09-24 09:32:23 +02:00
Lionel Debieve 6751b83652 mtd: spi_nor: change message level on macronix detection
Change the detection message from WARN to INFO when macronix
NOR is detected.

Change-Id: I488696f1fb75b823e85decfcd6cd32e7b36a6c2e
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2020-09-24 09:30:44 +02:00
Yann Gautier 769a990428 gpio: stm32_gpio: check GPIO node status after checking DT
The call to fdt_get_status(node) has to be done after the DT is found
to be valid.

Fixes: 1fc2130c5 stm32mp1: update device tree and gpio functions

Change-Id: I70f803aae3dde128a9e740f54c8837b64cb1a244
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2020-09-24 09:30:44 +02:00
Lionel Debieve 662c1f5c17 crypto: stm32_hash: fix issue when restarting computation
While restarting a new hash computation, STR register
is not cleared. It needs to be written before each
computation.

Change-Id: If65902dd21f9c139ec5da3ca87721232f73710db
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2020-09-24 09:30:44 +02:00
Yann Gautier 277d6af561 fdts: stm32mp1: realign device tree with kernel
There is one dtsi file per SoC version:
- STM32MP151: common part for all version, Single Cortex-A7
- STM32MP153: Dual Cortex-A7
- STM32MP157: + GPU and DSI, but not needed for TF-A

The STM32MP15xC include a cryptography peripheral, add it in a dedicated
file.

There are 4 packages available, for which  the IOs number change. Have one
file for each package. The 2 packages AB and AD are added.

STM32157A-DK1 and STM32MP157C-DK2 share most of their features, a common
dkx file is then created.

Some reordering is done in other files, and realign with kernel DT files.

The DDR files are generated with our internal tool, no changes in the
registers values.

Change-Id: I9f2ef00306310abe34b94c2f10fc7a77a10493d1
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2020-09-24 09:07:57 +02:00
Lauren Wehrmeister da9a837cad Merge "libc: Import strtok_r from FreeBSD project" into integration 2020-09-23 14:16:39 +00:00
Usama Arif 8f734c6528
fdts: tc0: update MHUv2 interrupt number
This is as part of the architecture change in TC0.

Change-Id: I470241f67938e7998941d26f0e8bc05073234152
Signed-off-by: Usama Arif <usama.arif@arm.com>
2020-09-22 17:06:43 +01:00
Javier Almansa Sobrino 6ac269d16c Select the Log Level for the Event Log Dump on Measured Boot at build time.
Builds in Debug mode with Measured Boot enabled might run out of trusted
SRAM. This patch allows to change the Log Level at which the Measured Boot
driver will dump the event log, so the latter can be accessed even on
Release builds if necessary, saving space on RAM.

Signed-off-by: Javier Almansa Sobrino <javier.almansasobrino@arm.com>
Change-Id: I133689e313776cb3f231b774c26cbca4760fa120
2020-09-22 14:54:50 +01:00
Manish Pandey 73740d98d9 Merge "plat: marvell: ap807: implement workaround for errata-id 3033912" into integration 2020-09-22 10:55:51 +00:00
Manish Pandey 5c5d82848d Merge "SPMC: adjust the number of EC context to max number of PEs" into integration 2020-09-22 09:50:31 +00:00
Yann Gautier 4170079ae0 stm32mp1: correct crash console GPIO alternate configuration
If GPIO port for UART TX is less than 8, the register GPIO_AFRL should
be used to set the alternate. GPIO_AFRH is used if GPIO port is greater
or equal to 8. The macro GPIO_TX_ALT_SHIFT is removed and the GPIO port
number is tested against GPIO_ALT_LOWER_LIMIT (=8) in
plat_crash_console_init() function.

Change-Id: Ibb62223ed6bce589bbcab59a5e986b2677e6d118
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2020-09-21 17:53:42 +02:00
Yann Gautier 6397423ed4 stm32mp1: add plat_panic_handler function
The STM32MP1 implementation of this function will call
plat_report_exception(). It displays more information about the panic
if DEBUG is enabled.
The LR register is also filled with R6 content, which hold the faulty
address. This allows debugger to reconstruct the backtrace.

Change-Id: I6710e8e2ab6658b05c5bbad2f3c545f07f355afb
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2020-09-21 17:53:42 +02:00
Yann Gautier a9eda77c22 stm32mp1: update plat_report_exception
In case DEBUG is enabled, plat_report_exception will now display extra
information of the cause of the exception.

Change-Id: I72cc9d180959cbf31c13821dd051eaf4462b733e
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2020-09-21 17:53:42 +02:00
Yann Gautier 00a55fe4c5 Align AARCH32 version of debug.S with AARCH64
Re-order code (put panic and report_exception at the end of the file).
Export asm_print_* functions.
Add asm_print_line_dec macro, and asm_print_newline func.
Align comments in both AARCH32 and AARCH64 files.
Add blank lines in AARCH64 files to align with AARCH32.

Change-Id: I8e299a27c1390f71f04e260cd4a0e59b2384eb19
Signed-off-by: Yann Gautier <yann.gautier@st.com>
2020-09-21 17:53:42 +02:00
Manish Pandey dffd5192df Merge "n1sdp: add support for remote chip pcie." into integration 2020-09-21 12:10:07 +00:00
Olivier Deprez c1a4b6b477 Merge "build_macros.mk: include assert and define loop macros" into integration 2020-09-21 08:28:50 +00:00
Olivier Deprez 8c00bccebe Merge "defaults.mk: default KEY_SIZE to 2048 in case of RSA algorithm" into integration 2020-09-21 08:28:28 +00:00
Madhukar Pappireddy 374eef025f libc: Import strtok_r from FreeBSD project
From commit: 21571b1d140ae7bb44e94c0afba2ec61456b275b
Made small changes to fit into TF-A project

Change-Id: I991f653a7ace04f9c84bcda78ad8d7114ea18e93
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
2020-09-18 11:58:41 -05:00
Manish Pandey 101daafd6b Merge changes from topic "ehf_common" into integration
* changes:
  plat: tegra: Use generic ehf defines
  ehf: use common priority level enumuration
2020-09-18 14:20:02 +00:00
Mark Dykes 80f823b727 Merge "spmd: remove assert for SPMC PC value" into integration 2020-09-17 19:48:27 +00:00
Madhukar Pappireddy b39dca401d Merge "doc: Recommend using C rather than assembly language" into integration 2020-09-16 18:00:21 +00:00
Sayanta Pattanayak 35d626bb27 n1sdp: add support for remote chip pcie.
Remote chip  ITS, SMMU, PCIe nodes are added for enabling remote
chip PCIe hierarchy.

Change-Id: I5b3ca733715defa38e413588ccd13d0688cba271
Signed-off-by: Sayanta Pattanayak <sayanta.pattanayak@arm.com>
Signed-off-by: Khasim Syed Mohammed <khasim.mohammed@arm.com>
2020-09-16 22:01:00 +05:30
Madhukar Pappireddy 8f5426cc4b Merge "SPE: Fix feature detection" into integration 2020-09-15 21:21:24 +00:00
Madhukar Pappireddy b2a9e431f4 Merge changes from topic "cot-parser" into integration
* changes:
  plat/arm: fvp: Increase BL2 maximum size
  lib: fconf: Implement a parser to populate CoT
2020-09-15 16:53:56 +00:00
Mark Dykes 51ca09179d Merge "doc: Correct CPACR.FPEN usage" into integration 2020-09-15 16:44:09 +00:00
Olivier Deprez 95879319f5 SPMC: adjust the number of EC context to max number of PEs
According to [1] and in context of FF-A v1.0 a secure partition must
have either one EC (migratable UP) or a number of ECs equal to the
number of PEs (pinned MP). Adjust the SPMC manifest such that the
number of ECs is equal to the number of PEs.

[1] https://trustedfirmware-a.readthedocs.io/en/latest/components/
secure-partition-manager.html#platform-topology

Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
Change-Id: Ie8c7d96ae7107cb27f5b97882d8f476c18e026d4
2020-09-15 17:25:57 +02:00
Manish V Badarkhe 70fb765396 plat/arm: fvp: Increase BL2 maximum size
Increased BL2 maximum size when CoT descriptors are placed
in device tree.

Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: I6466d2841e189e7f15eb4f1a8db070542893cb5b
2020-09-15 15:14:53 +00:00
Manish V Badarkhe 28e9a55fc8 lib: fconf: Implement a parser to populate CoT
Implemented a parser which populates the properties of
the CoT descriptors as per the binding document [1].
'COT_DESC_IN_DTB' build option is disabled by default and can
be enabled in future for all Arm platforms by making necessary
changes in the memory map.
Currently, this parser is tested only for FVP platform.

[1]:
https://trustedfirmware-a.readthedocs.io/en/latest/components/cot-binding.html

Change-Id: I2f911206087a1a2942aa728de151d2ac269d27cc
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2020-09-15 16:13:26 +01:00
Madhukar Pappireddy 47bda02c8e Merge "doc: add description of "owner" field in SP layout file." into integration 2020-09-15 14:33:27 +00:00
Manish Pandey 7c9499623b Merge changes from topic "sami/834_fiptool_pack_issue_win_v1" into integration
* changes:
  Update makefile to build fiptool for Windows
  Fix fiptool packaging issue on windows
2020-09-15 14:05:34 +00:00
Manish Pandey 0901d3398d doc: add description of "owner" field in SP layout file.
Change-Id: Iedaa83ed546eb2476849a8d53f6e05b847a48b23
Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
2020-09-15 09:45:15 +00:00
Manish Pandey a6f65b1152 Merge "fdts: corstone700: add NXP isp1763 node to device tree" into integration 2020-09-15 06:32:12 +00:00
Mark Dykes 1aabb74fae Merge "rockchip: don't crash if we get an FDT we can't parse" into integration 2020-09-14 21:49:38 +00:00
Andre Przywara b85359296c SPE: Fix feature detection
Currently the feature test for the SPE extension requires the feature
bits in the ID_AA64DFR0 register to read exactly 0b0001.
However the architecture guarantees that any values greater than 0
indicate the presence of a feature, which is what we are after in
our spe_supported() function.

Change the comparison to include all values greater than 0.

This fixes SPE support in non-secure world on implementations which
include the Scalable Vector Extension (SVE), for instance on Zeus cores.

Change-Id: If6cbd1b72d6abb8a303e2c0a7839d508f071cdbe
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2020-09-14 18:00:18 +01:00
Leonardo Sandoval 327131c4c7 build_macros.mk: include assert and define loop macros
Loop macros make it easier for developers to include new variables to
assert or define and also help code code readability on makefiles.

Change-Id: I0d21d6e67b3eca8976c4d856ac8ccc02c8bb5ffa
Signed-off-by: Leonardo Sandoval <leonardo.sandoval@linaro.org>
2020-09-14 09:27:53 -05:00
Sami Mujawar 88a1cf1e4e Update makefile to build fiptool for Windows
Although support for building fiptool on a Windows host was present,
the binary was not built when the top level makefile was invoked.

This patch makes the necessary changes to the to support building of
fiptool on a Windows host PC from the main makefile.

Change-Id: I0c01ba237fa3010a027a1b324201131210cf4d7c
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
2020-09-14 15:06:56 +01:00
Sami Mujawar cb5c08b698 Fix fiptool packaging issue on windows
Windows does not have a standard getopt implementation. To address
this an equivalent implementation has been provided in win_posix.c
However, the implementation has an issue with option processing as
described below.

Long option names may be abbreviated if the abbreviation is unique
or an exact match for some defined option.
Since some options can be substring of other options e.g. "scp-fw"
option is a substring of "scp-fwu-cfg", we need to identify if an
option is abbreviated and also check for uniqueness. Otherwise if
a user passes --scp-fw as an option, the "scp-fwu-cfg" option may
get selected, resulting in an incorrectly packaged FIP.

This issue has been be fixed by:
  - First searching for an exact match.
  - If exact match was not found search for a abbreviated match.
By doing this an incorrect option selection can be avoided.

Change-Id: I22f4e7a683f3df857f5b6f0783bf9b03a64a0bcc
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
2020-09-14 15:06:56 +01:00
Peng Fan 093ba62e14 doc: Correct CPACR.FPEN usage
To avoid trapping from EL0/1, FPEN bits need to be set 0x3, not
clearing.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Change-Id: Ic34e9aeb876872883c5f040618ed6d50f21dacd0
2020-09-14 02:35:50 +00:00
Mark Dykes 34029d01c6 Merge "libc: Import strlcat from FreeBSD project" into integration 2020-09-11 18:44:19 +00:00
Mark Dykes ddf04313dc Merge "libc: Add support for vsnprintf()" into integration 2020-09-11 18:42:23 +00:00
Madhukar Pappireddy 77648689ad libc: Add support for vsnprintf()
It uses the existing implementation of snprintf() function

Change-Id: Ie59418564c2e415222e819cf322c34e9a4d1f336
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
2020-09-11 11:34:01 -05:00
Madhukar Pappireddy 238db174b5 Merge "Workaround for Neoverse N1 erratum 1868343" into integration 2020-09-11 14:56:35 +00:00
Manish Pandey 9cdff51097 Merge "tc0: increase SCP_BL2 size to 128 kB" into integration 2020-09-11 14:01:50 +00:00
Manish Pandey ab9646f511 Merge "SPM: Get rid of uint32_t array representation of UUID" into integration 2020-09-11 10:47:48 +00:00
Mark Dykes 76a08094c5 Merge "tools: Set the tool's default binary name" into integration 2020-09-10 19:00:20 +00:00
johpow01 61f0ffc40a Workaround for Neoverse N1 erratum 1868343
Neoverse N1 erratum 1868343 is a Cat B erratum, present in older
revisions of the Neoverse N1 processor core.  The workaround is to
set a bit in the CPUACTLR_EL1 system register, which delays instruction
fetch after branch misprediction. This workaround will have a small
impact on performance.

SDEN can be found here:
https://documentation-service.arm.com/static/5f2c130260a93e65927bc92f

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I37da2b3b2da697701b883bff9a1eff2772352844
2020-09-10 12:32:09 -05:00
Leonardo Sandoval ee15a17272 defaults.mk: default KEY_SIZE to 2048 in case of RSA algorithm
According to the documentation [1], KEY_SIZE defaults to 2048 when RSA
algorithm is chosen, so set this value on the make's defaults file.

[1] https://trustedfirmware-a.readthedocs.io/en/latest/getting_started/build-options.html

Change-Id: I030f98363198a752bc0dd03528f748de527d48d8
Signed-off-by: Leonardo Sandoval <leonardo.sandoval@linaro.org>
2020-09-10 10:19:43 -05:00
Manish Pandey 5b0d839f7b Merge "plat/arm: rdn1edge: Correct mismatched parenthesis in makefile" into integration 2020-09-10 14:40:16 +00:00
Madhukar Pappireddy 071d4953a0 Merge "Addition of standard APIs in qtiseclib interface" into integration 2020-09-10 14:28:35 +00:00
Usama Arif dd14887e15
tc0: increase SCP_BL2 size to 128 kB
The size of debug binaries of SCP has increased beyond the current
limit of 80kB set in platform. Hence, increase it to 128kB.

Change-Id: I5dbcf87f8fb35672b39abdb942c0691fb339444a
Signed-off-by: Usama Arif <usama.arif@arm.com>
2020-09-10 15:05:58 +01:00