Commit Graph

7 Commits

Author SHA1 Message Date
Norbert Werner 67878cb0e5 Xilinx zynqmp: add missing pin control group for ethernet 0.
Signed-off-by: Norbert Werner <opensource@lab-w.org>
Change-Id: I3264515e5901689328861964ff664ff08b6e852c
2020-01-22 10:36:23 +00:00
Antonio Nino Diaz 09d40e0e08 Sanitise includes across codebase
Enforce full include path for includes. Deprecate old paths.

The following folders inside include/lib have been left unchanged:

- include/lib/cpus/${ARCH}
- include/lib/el3_runtime/${ARCH}

The reason for this change is that having a global namespace for
includes isn't a good idea. It defeats one of the advantages of having
folders and it introduces problems that are sometimes subtle (because
you may not know the header you are actually including if there are two
of them).

For example, this patch had to be created because two headers were
called the same way: e0ea0928d5 ("Fix gpio includes of mt8173 platform
to avoid collision."). More recently, this patch has had similar
problems: 46f9b2c3a2 ("drivers: add tzc380 support").

This problem was introduced in commit 4ecca33988 ("Move include and
source files to logical locations"). At that time, there weren't too
many headers so it wasn't a real issue. However, time has shown that
this creates problems.

Platforms that want to preserve the way they include headers may add the
removed paths to PLAT_INCLUDES, but this is discouraged.

Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2019-01-04 10:43:17 +00:00
Jolly Shah 37e1a68e58 zynqmp: pm: Minor corrections for MISRA compliance
Various changes to comply with MISRA static analysis rules

Signed-off-by: Jolly Shah <jollys@xilinx.com>
2018-03-15 10:28:29 -07:00
Rajan Vaja cc974c52c2 zynqmp: pm_service: Support multiple SDIO modes
Existing database allows to set only single mode for SDIO.
SDIO can have different groups (8 bit, 4 bit and 1 bit).
As there is only single SDIO group in each pin, it is not
 possible to use different mode groups for SDIO.

Extend database in generic way to allow multiuple function
groups in single pin. Add different SDIO groups to pins and
create separate functions for each modes.

Signed-off-by: Rajan Vaja <rajanv@xilinx.com>
2018-03-15 10:24:14 -07:00
Rajan Vaja bd99265b06 zynqmp: pm: Add APIs for pin control queries
Add pin control APIs which driver can use to query
pin information from firmware. Using these APIs,
driver do not need to maintain hard-coded pin database.

Major changes in patch are:
- Add pin database with pins, functions and function groups
  information
- Implement APIs for pin information queries
- Update pin control APIs for get/set functions to use new
  pin control database. Remove pin database which was added
  earlier.

Signed-off-by: Rajan Vaja <rajanv@xilinx.com>
Signed-off-by: Jolly Shah <jollys@xilinx.com>
2018-03-15 10:23:54 -07:00
Rajan Vaja d0e2c51ae3 zynqmp: pm: Implement pin control APIs for configurations
Implement pin control APIs which uses MMIO operations
to set/get values of configuration parameters.

Signed-off-by: Rajan Vaja <rajanv@xilinx.com>
Signed-off-by: Jolly Shah <jollys@xilinx.com>
2018-03-15 10:23:27 -07:00
Rajan Vaja e52e10add2 zynqmp: pm: Implement pin control APIs for get/set functions
Implement pin control APIs which uses MMIO operations
to set/get functions for the given pin.

Signed-off-by: Rajan Vaja <rajanv@xilinx.com>
Signed-off-by: Jolly Shah <jollys@xilinx.com>
2018-03-15 10:23:22 -07:00