arm-trusted-firmware

Commit Graph

Author	SHA1	Message	Date
Thomas Abraham	5dae6bc71c	plat/sgi: allow access to nor2 flash and system registers from s-el0 Allow the access of system registers and nor2 flash memory region from s-el0. This allows the secure parititions residing at s-el0 to access these memory regions. Signed-off-by: Thomas Abraham <thomas.abraham@arm.com> Change-Id: I3887a86770de806323fbde0d20fdc96eec6e0c3c	2021-03-29 18:52:34 +05:30
Aditya Angadi	284efb16b4	plat/arm/sgi: platform definitions for upcoming platforms Upcoming RD platforms have changes in the SOC address map from that of the existing platforms. As a prepartory step to add support for the upcoming platforms, create platform definitions for those platforms. Change-Id: Ic5df9fed02c44e65ec260bbb5efc1b8dbd919a56 Signed-off-by: Aditya Angadi <aditya.angadi@arm.com>	2020-12-09 10:40:08 +00:00

Author

SHA1

Message

Date

Thomas Abraham

5dae6bc71c

plat/sgi: allow access to nor2 flash and system registers from s-el0

Allow the access of system registers and nor2 flash memory region
from s-el0. This allows the secure parititions residing at s-el0
to access these memory regions.

Signed-off-by: Thomas Abraham <thomas.abraham@arm.com>
Change-Id: I3887a86770de806323fbde0d20fdc96eec6e0c3c

2021-03-29 18:52:34 +05:30

Aditya Angadi

284efb16b4

plat/arm/sgi: platform definitions for upcoming platforms

Upcoming RD platforms have changes in the SOC address map from that
of the existing platforms. As a prepartory step to add support for the
upcoming platforms, create platform definitions for those platforms.

Change-Id: Ic5df9fed02c44e65ec260bbb5efc1b8dbd919a56
Signed-off-by: Aditya Angadi <aditya.angadi@arm.com>

2020-12-09 10:40:08 +00:00

2 Commits