Commit Graph

5 Commits

Author SHA1 Message Date
Yatharth Kochar c073fda1c6 Move `plat_get_syscnt_freq()` to arm_common.c
This patch moves the definition for `plat_get_syscnt_freq()`
from arm_bl31_setup.c to arm_common.c. This could be useful
in case a delay timer needs to be installed based on the
generic timer in other BLs.
This patch also modifies the return type for this function
from `uint64_t` to `unsigned long long` within ARM and other
platform files.

Change-Id: Iccdfa811948e660d4fdcaae60ad1d700e4eda80d
2016-04-21 17:10:58 +01:00
Varun Wadekar 71cb26ea5b Tegra: remove support for legacy platform APIs
This patch modifies the Tegra port to support the new platform
APIs so that we can disable the compat layer. This includes
modifications to the power management and platform topology code.

Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2015-12-04 15:41:20 -08:00
Varun Wadekar 3b40f993f4 Tegra: introduce per-soc system reset handler
This patch adds a per-soc system reset handler for Tegra chips. The
handler gets executed before the actual system resets. This allows
for custom handling of the system reset sequence on each SoC.

Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2015-11-10 09:25:28 -08:00
Varun Wadekar 2ee2c4f0bb Tegra132: set TZDRAM_BASE to 0xF5C00000
The TZDRAM base on the reference platform has been bumped up due to
some BL2 memory cleanup. Platforms can also use a different TZDRAM
base by setting TZDRAM_BASE=<value> in the build command line.

Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2015-07-31 10:26:22 +05:30
Varun Wadekar e7d4caa298 Tegra: Support for Tegra's T132 platforms
This patch implements support for T132 (Denver CPU) based Tegra
platforms.

The following features have been added:

* SiP calls to switch T132 CPU's AARCH mode
* Complete PSCI support, including 'System Suspend'
* Platform specific MMIO settings
* Locking of CPU vector registers

Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2015-07-24 09:25:23 +05:30