Commit Graph

8 Commits

Author SHA1 Message Date
Rex-BC Chen e46e9df0d0 feat(mt8186): add DFD control in SiP service
DFD (Design for Debug) is a debugging tool, which scans flip-flops and
dumps to internal RAM on the WDT reset. After system reboots, those
values could be showed for debugging.

BUG=b:222217317
TEST=build pass

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: I659ea1e0789cf135a71a13b752edaa35123e0941
2022-03-11 17:47:05 +08:00
jason-ch chen 7ac6a76c47 feat(mt8186): add SPM suspend driver
Add SPM suspend driver for suspend/resume features.

TEST=build pass
BUG=b:202871018

Signed-off-by: Jason-ch Chen <jason-ch.chen@mediatek.com>
Change-Id: I25b4b97cd3138a7b347385539e47ccfa884d64fc
2022-01-13 10:10:56 +08:00
Rex-BC Chen 24dd5a7b71 feat(plat/mediatek/mt8186): add reboot function for PSCI
Add system_reset function in PSCI operations.

TEST=build pass
BUG=b:202871018

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: I41001484f6244bd6ae7dedcfb6ce71cd6c035a1e
2021-12-22 18:06:53 +08:00
Rex-BC Chen a68346a772 feat(plat/mdeiatek/mt8186): add power-off function for PSCI
Add support for system-off.

TEST=build pass
BUG=b:202871018

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: Ic734696aab1b71ae85bca6ed08e544a522ce5c95
2021-12-22 18:06:53 +08:00
Garmin.Chang 06cb65ef07 feat(plat/mediatek/mt8186): add MCDI drivers
Add MCDI related drivers to handle CPU powered on/off in CPU suspend.

TEST=build pass
BUG=b:202871018

Change-Id: I85aaaf3a0e992a39d17c58f3d9d5ff1b5770f748
Signed-off-by: Garmin.Chang <Garmin.Chang@mediatek.com>
2021-12-22 18:06:53 +08:00
Garmin.Chang 1da57e54b2 feat(plat/mediatek/mt8186): add CPU hotplug
Implement PSCI platform operations to support CPU hotplug and MCDI.

TEST=bringup 8 CPUs successfully on kernel stage.
BUG=b:202871018

Change-Id: Ibd5423b70b3ca3f91edaa48d7ca5bc094e751510
Signed-off-by: Garmin.Chang <Garmin.Chang@mediatek.com>
2021-12-22 18:06:53 +08:00
James Lo 5bc88ec61c feat(plat/mediatek/mt8186): add pwrap and pmic driver
1. Add 8186 pwrap driver to access pmic.
2. Add 6366 pmic driver to support clean PWRHOLD.

TEST=build pass
BUG=b:202871018

Signed-off-by: James Lo <james.lo@mediatek.corp-partner.google.com>
Change-Id: I3bc90460a6a55dff8d3293e04482abcad789bbb2
2021-12-22 18:06:53 +08:00
Rex-BC Chen 27132f13ca feat(mt8186): initialize platform for MediaTek MT8186
- Add basic platform setup.
- Add MT8186 documentation at docs/plat/.
- Add generic CPU helper functions.
- Add basic register address.

TEST=build pass
BUG=b:202871018

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: Id3e2f46a8c3ab2f3e29137e508d4c671e8f4aad5
2021-12-01 16:36:28 +01:00