All identifiers, regardless of use, that start with two underscores are
reserved. This means they can't be used in header guards.
The style that this project is now to use the full name of the file in
capital letters followed by 'H'. For example, for a file called
"uart_example.h", the header guard is UART_EXAMPLE_H.
The exceptions are files that are imported from other projects:
- CryptoCell driver
- dt-bindings folders
- zlib headers
Change-Id: I50561bf6c88b491ec440d0c8385c74650f3c106e
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
To make software license auditing simpler, use SPDX[0] license
identifiers instead of duplicating the license text in every file.
NOTE: Files that have been imported by FreeBSD have not been modified.
[0]: https://spdx.org/
Change-Id: I80a00e1f641b8cc075ca5a95b10607ed9ed8761a
Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
Not having U or ULL as a suffix for these enums causes
a lot of unnecessary MISRA issues. This patch adds U or
ULL suffix to these common enums to reduce number of
MISRA issues.
Signed-off-by: Anthony Zhou <anzhou@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
This patch updates the ARI header file to v3.1.
Change-Id: I3e58cf50d27fb6e72062bb9d9782b75296b32025
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
This patch updates the ARI header to version 3.0
Change-Id: I7cfe0c61c80a6b78625232135dd63393602d32fe
Signed-off-by: Krishna Sitaraman <ksitaraman@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
The CPU Complex (CCPLEX) Power Manager (Denver MCE, or DMCE) is an
offload engine for BPMP to do voltage related sequencing and for
hardware requests to be handled in a better latency than BPMP-firmware.
There are two interfaces to the MCEs - Abstract Request Interface (ARI)
and the traditional NVGINDEX/NVGDATA interface.
MCE supports various commands which can be used by CPUs - ARM as well
as Denver, for power management and reset functionality. Since the
linux kernel is the master for all these scenarios, each MCE command
can be issued by a corresponding SMC. These SMCs have been moved to
SiP SMC space as they are specific to the Tegra186 SoC.
Change-Id: I67bee83d2289a8ab63bc5556e5744e5043803e51
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Antonio Nino Diaz
dp-arm
Anthony Zhou
Varun Wadekar
Krishna Sitaraman