On Juno, we don't need the following components so this patch
removes them of the images:
- semihosting support;
- FVP power controller support;
- GICv3 support.
BL30 needs an entry in the table in io_fip.c. I made it #ifdef'd so
that ports that don't use a BL30 won't break.
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Juno has a "taped out" BL1.
To run your own BL1 on the board, you have to place it in a "ROM bypass"
address and configure the platform to boot from there.
The agreed bypass address is an offset of 0x03EC0000 from the start of
NOR flash (0x08000000), which equates to 0x0BEC0000.
To run the model using a BL1 in bypass mode, you should use a parameter
set something like this:
<path to>/FVP_CSS_Juno3 \
-C css.aon.scp.ROMloader.fname=<SCP ROM filename> \
--data css.cluster1.cpu0=bl1.bin@0x0BEC0000 \
-C soc.scc.apps_alt_boot=0x0BEC0000
To build BL1 as a ROM located at address zero, you can over-ride the
default value for TZROM_BASE by passing parameters to make, eg:
ASFLAGS="-D TZROM_BASE=0x00000000" \
CFLAGS="-D TZROM_BASE=0x00000000" \
CROSS_COMPILE=aarch64-linux-gnu- \
make PLAT=juno DEBUG=1 all
Then you can launch the model using a command such as:
<path to>/FVP_CSS_Juno3 \
-C css.aon.scp.ROMloader.fname=<SCP ROM filename> \
-C css.trustedBootROMloader.fname=<path to>/bl1.bin \
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Currently UEFI and Linux are using SMC calls in the 'ARM Architecture'
Owning Entity range so lets implement these to get things working.
UEFI probably doesn't actually need to issue the ID_PRESENCE and ID_UID
calls it does, and the device-tree used by Linux could specify the PSCI
identifiers instead. After those changes, this patch isn't required.
Signed-off-by: Jon Medhurst <tixy@linaro.org>
The SCP Ready command is sent by the SCP to indicate that the BL3-0 RAM
Firmware image is successfully up and running.
Signed-off-by: Jon Medhurst <tixy@linaro.org>
Note, on Juno mailboxes are 16 bytes because any bigger and they would
overlap the memory used for MHU payload data for SCP->AP transfers.
Signed-off-by: Jon Medhurst <tixy@linaro.org>
Juno doesn't have TZDRAM as FVP does, and there is real reason why we
need a special memory region for bl31_args anyway, assuming we take care
to copy it in BL31 before BL2's memory is reused.
Signed-off-by: Jon Medhurst <tixy@linaro.org>
This patch adds documentation that describes the design of the Interrupt
management framework in the ARM Trusted Firmware. The porting-guide.md has also
been updated to describe the interface that should be implemented by each
platform to support this framework.
Change-Id: I3eda48e5c9456e6a9516956bee16a29e366633b7
Co-Authored-By: Soby Mathew <soby.mathew@arm.com>
Update documentation with BL3-1 hardening interface
changes and for using BL3-1 as a reset vector feature
Change-Id: Iafdd05e7a8e66503409f2acc934372efef5bc51b
Update the Linux kernel, Linaro file system, FVP and DS-5 versions used for the
v0.4 release in user-guide.md.
Change-Id: I2265fc17c229d4b8cc52165d6583a4a579cdcee3
This patch modifies and adds to the existing documentation
for the crash reporting implementation in BL3-1.
Change-Id: I2cfbfeeeb64996ec7d19a9ddf95295482899b4bd
Following recent refactoring changes to platform.h, this commit updates
porting-guide.md to correctly refer to platform.h and platform_def.h where
appropriate.
Change-Id: Idf1e77503c24358696f8f3c14caa0cc1d579deb4
Sandrine Bailleux
Jon Medhurst
Ryan Harkin
Dan Handley
Achin Gupta
Vikram Kanigiri
Soby Mathew