arm-trusted-firmware/plat/intel/soc/common/include
Sieu Mun Tang 673afd6f8e fix(intel): fix configuration status based on start request
This patch is to fix configuration status command now returns
the result based on the last config start command made to the
runtime software. The status type can be either:
- NO_REQUEST (default)
- RECONFIGURATION
- BITSTREAM_AUTH

Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
Change-Id: I1ce4b7b4c741d88de88778f8fbed7dfe83a39fbc
2022-05-13 16:46:20 +08:00
..
plat_macros.S intel: Platform common code refactor 2019-08-07 12:19:11 +00:00
platform_def.h feat(intel): implement timer init divider via cpu frequency. (#1) 2022-05-06 17:37:45 +02:00
socfpga_emac.h intel: Enable EMAC PHY in Intel FPGA platform 2020-02-25 10:19:51 +08:00
socfpga_f2sdram_manager.h feat(intel): add support for F2S and S2F bridge SMC with mask to enable, disable and reset bridge 2022-05-05 22:58:03 +08:00
socfpga_fcs.h fix(intel): extending to support large file size for SHA2/HMAC get digest and verifying 2022-05-11 17:45:57 +08:00
socfpga_handoff.h intel: Change boot source selection 2020-02-03 14:31:52 +08:00
socfpga_mailbox.h feat(intel): support version 2 SiP SVC SMC function ID for mailbox commands 2022-05-11 17:45:37 +08:00
socfpga_noc.h feat(intel): enable firewall for OCRAM in BL31 2022-04-28 19:08:35 +08:00
socfpga_private.h feat(intel): implement timer init divider via cpu frequency. (#1) 2022-05-06 17:37:45 +02:00
socfpga_reset_manager.h feat(intel): support version 2 SiP SVC SMC function ID for non-mailbox commands 2022-05-11 17:43:16 +08:00
socfpga_sip_svc.h fix(intel): fix configuration status based on start request 2022-05-13 16:46:20 +08:00
socfpga_system_manager.h feat(intel): add support for F2S and S2F bridge SMC with mask to enable, disable and reset bridge 2022-05-05 22:58:03 +08:00