270367fbf7
Marvell uses RAM address 0x0 for loading BL33 stage images. When ATF is built with DEBUG=1, its IO subsystem fails on assert checking the destination RAM address != 0. This patch adds PLAT_ALLOW_ZERO_ADDR_COPY to A3K platform allowing to bypass the above check in debug mode. Change-Id: I687e35cb2e9dc3166bdaa81b3904c20b784c5c6a Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> |
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a3700_plat_def.h | ||
a3700_pm.h | ||
ddr_info.h | ||
dram_win.h | ||
io_addr_dec.h | ||
plat_macros.S | ||
platform_def.h |