Konstantin Porotchkin 11e6ed094d drivers: marvell: mochi: Update AP incoming masters secure level ... Do not force non-secure access level for PIDI masters when LLC_SRAM is enabled. The EIP197 is located on CP0 and need to access secure SRAM in AP LLC. This requires EIP197 DMA to have AXPROT[1]=0 and not changed when forwarded to address decoding tables. Change-Id: I8962db94a124350c14220ba6d0364d294ae4664a Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>		2020-10-04 15:29:05 +02:00
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comphy	drivers: marvell: mg_conf_cm3: pass comphy lane number to AP FW	2020-07-10 10:55:09 +00:00
mc_trustzone	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00
mg_conf_cm3	drivers: marvell: mg_conf_cm3: pass comphy lane number to AP FW	2020-07-10 10:55:09 +00:00
mochi	drivers: marvell: mochi: Update AP incoming masters secure level	2020-10-04 15:29:05 +02:00
uart	a3700: Use generic console_t data structure	2020-02-25 09:34:38 +00:00
amb_adec.c	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00
ap807_clocks_init.c	ble: ap807: improve PLL configuration sequence	2020-06-07 00:06:03 +02:00
cache_llc.c	drivers: marvell: Fix the LLC SRAM driver	2020-07-10 10:55:33 +00:00
ccu.c	plat: marvell: armada: add ccu window for workaround errata-id 3033912	2020-10-04 15:23:29 +02:00
comphy.h	Standardise header guards across codebase	2018-11-08 10:20:19 +00:00
gwin.c	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00
io_win.c	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00
iob.c	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00
mci.c	plat: marvell: mci: perform mci link tuning for all mci interfaces	2020-06-07 00:06:03 +02:00
thermal.c	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00