Grzegorz Jaszczyk 2cae4a8586 drivers: marvell: mg_conf_cm3: pass comphy lane number to AP FW ... Since the AP process can be enabled on different setups, the information about used comphy lane should be passed to AP FW. For instance: - A8K development board uses comphy lane 2 for eth 0 - cn913x development board uses comphy lane 4 for eth 0 Change-Id: Icf001fb3eea4d9c24c09384e49844ecaf8655ad2 Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>		2020-07-10 10:55:09 +00:00
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comphy-cp110.h	marvell: comphy: update rx_training procedure	2020-06-19 17:13:09 +02:00
phy-comphy-3700.c	drivers: marvell: comphy-a3700: support SGMII COMPHY power off	2019-12-11 14:25:09 +00:00
phy-comphy-3700.h	Standardise header guards across codebase	2018-11-08 10:20:19 +00:00
phy-comphy-common.h	mvebu: cp110: avoid pcie power on/off sequence when called from Linux	2018-12-04 14:09:44 +02:00
phy-comphy-cp110.c	drivers: marvell: mg_conf_cm3: pass comphy lane number to AP FW	2020-07-10 10:55:09 +00:00
phy-comphy-cp110.h	marvell: armada: add extra level in marvell platform hierarchy	2020-06-07 00:06:03 +02:00
phy-default-porting-layer.h	Standardise header guards across codebase	2018-11-08 10:20:19 +00:00