arm-trusted-firmware/bl32/tsp
Achin Gupta 196231425e Add barriers to handle Secure Timer interrupts correctly
This patch adds instruction synchronization barriers around the code which
handles the timer interrupt in the TSP. This ensures that the interrupt is not
acknowledged after or EOIed before it is deactivated at the peripheral.

Change-Id: Ie2f01f4f2e5c032ba61c7014d09ad86a3c5a0b97
2014-08-12 14:15:05 +01:00
..
aarch64 Call platform_is_primary_cpu() only from reset handler 2014-08-01 09:39:50 +01:00
tsp-fvp.mk Refactor fvp gic code to be a generic driver 2014-07-09 16:36:39 +01:00
tsp-juno.mk Juno: Add support for BL3-2 image 2014-08-12 14:08:46 +01:00
tsp.ld.S fvp: Reuse BL1 and BL2 memory through image overlaying 2014-07-10 16:34:54 +01:00
tsp.mk Support asynchronous method for BL3-2 initialization 2014-08-01 09:48:07 +01:00
tsp_interrupt.c Implement a leaner printf for Trusted Firmware 2014-07-25 12:18:33 +01:00
tsp_main.c Add support for printing version at runtime 2014-07-25 15:02:08 +01:00
tsp_timer.c Add barriers to handle Secure Timer interrupts correctly 2014-08-12 14:15:05 +01:00