Soby Mathew fdfabec10c Optimize EL3 register state stored in cpu_context structure ... This patch further optimizes the EL3 register state stored in cpu_context. The 2 registers which are removed from cpu_context are: * cntfrq_el0 is the system timer register which is writable only in EL3 and it can be programmed during cold/warm boot. Hence it need not be saved to cpu_context. * cptr_el3 controls access to Trace, Floating-point, and Advanced SIMD functionality and it is programmed every time during cold and warm boot. The current BL3-1 implementation does not need to modify the access controls during normal execution and hence they are expected to remain static. Fixes ARM-software/tf-issues#197 Change-Id: I599ceee3b73a7dcfd37069fd41b60e3d397a7b18		2014-07-31 10:09:58 +01:00
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psci	Optimize EL3 register state stored in cpu_context structure	2014-07-31 10:09:58 +01:00
std_svc_setup.c	Reduce deep nesting of header files	2014-05-06 13:57:48 +01:00