fdfabec10c
This patch further optimizes the EL3 register state stored in
cpu_context. The 2 registers which are removed from cpu_context are:
* cntfrq_el0 is the system timer register which is writable
only in EL3 and it can be programmed during cold/warm boot. Hence
it need not be saved to cpu_context.
* cptr_el3 controls access to Trace, Floating-point, and Advanced
SIMD functionality and it is programmed every time during cold
and warm boot. The current BL3-1 implementation does not need to
modify the access controls during normal execution and hence
they are expected to remain static.
Fixes ARM-software/tf-issues#197
Change-Id: I599ceee3b73a7dcfd37069fd41b60e3d397a7b18
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| .. | ||
| psci_afflvl_off.c | ||
| psci_afflvl_on.c | ||
| psci_afflvl_suspend.c | ||
| psci_common.c | ||
| psci_entry.S | ||
| psci_helpers.S | ||
| psci_main.c | ||
| psci_private.h | ||
| psci_setup.c | ||