Upstream fork of ATF with a couple of rk3399 patches to remove HDCP blob and increase BAUD_RATE.
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Patrick Delaunay 26cf5cf6d6 refactor(stm32mp1): remove the support of calibration result
The support of a predefined DDR PHY tuning result is removed for
STM32MP1 driver because it is not needed at the supported frequency
when built-in calibration is executed.

The calibration parameters were provided in the device tree by the
optional node "st,phy-cal", activated in ddr helper file by the
compilation flag DDR_PHY_CAL_SKIP and filled with values generated
by CubeMX.

This patch
- updates the binding file to remove "st,phy-cal" support
- updates the device trees and remove the associated defines
- simplifies the STM32MP1 DDR driver and remove the support of
  the optional "st,phy-cal"

After this patch the built-in calibration is always executed.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Change-Id: I3fc445520c259f7f05730aefc25e64b328bf7159
2022-01-05 11:09:59 +01:00
.husky build(hooks): add commitlint hook 2021-04-19 14:06:25 +01:00
bl1 feat(measured_boot): image hash measurement and recording in BL1 2021-10-12 17:53:48 +01:00
bl2 feat(measured boot): move init and teardown functions to platform layer 2021-10-12 17:53:47 +01:00
bl2u Avoid the use of linker *_SIZE__ macros 2021-04-21 15:05:57 +02:00
bl31 feat(sme): enable SME functionality 2021-11-12 10:38:00 -06:00
bl32 fix: use correct printf format for uint64_t 2021-11-12 13:02:02 +00:00
common Merge "fix: libc: use long for 64-bit types on aarch64" into integration 2021-11-08 21:34:42 +01:00
docs Merge "fix(errata): workaround for Cortex X2 erratum 2058056" into integration 2021-12-22 15:23:00 +01:00
drivers refactor(stm32mp1): remove the support of calibration result 2022-01-05 11:09:59 +01:00
fdts refactor(stm32mp1): remove the support of calibration result 2022-01-05 11:09:59 +01:00
include refactor(stm32mp1): remove the support of calibration result 2022-01-05 11:09:59 +01:00
lib Merge "feat(ccidx): update the do_dcsw_op function to support FEAT_CCIDX" into integration 2021-12-24 11:26:32 +01:00
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plat Merge "feat(plat/mediatek/mt8195): improve SPM wakeup log" into integration 2022-01-04 20:10:25 +01:00
services Merge "fix(trp): Distinguish between cold and warm boot" into integration 2021-12-22 21:13:03 +01:00
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Makefile Merge "fix(sve): disable ENABLE_SVE_FOR_NS for AARCH32" into integration 2021-12-22 23:57:16 +01:00
dco.txt Drop requirement for CLA in contribution.md 2016-09-27 21:52:03 +01:00
license.rst doc: De-duplicate readme and license files 2019-10-08 16:36:15 +00:00
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package.json build(docs): introduce release script 2021-11-17 16:04:37 +00:00
readme.rst doc: Formatting fixes for readme.rst 2019-10-09 15:37:59 +00:00

readme.rst

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Trusted Firmware-A

Trusted Firmware-A (TF-A) is a reference implementation of secure world software for Arm A-Profile architectures (Armv8-A and Armv7-A), including an Exception Level 3 (EL3) Secure Monitor. It provides a suitable starting point for productization of secure world boot and runtime firmware, in either the AArch32 or AArch64 execution states.

TF-A implements Arm interface standards, including:

The code is designed to be portable and reusable across hardware platforms and software models that are based on the Armv8-A and Armv7-A architectures.

In collaboration with interested parties, we will continue to enhance TF-A with reference implementations of Arm standards to benefit developers working with Armv7-A and Armv8-A TrustZone technology.

Users are encouraged to do their own security validation, including penetration testing, on any secure world code derived from TF-A.

More Info and Documentation

To find out more about Trusted Firmware-A, please view the full documentation that is available through trustedfirmware.org.


Copyright (c) 2013-2019, Arm Limited and Contributors. All rights reserved.

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