arm-trusted-firmware/include/bl31
Vikram Kanigiri 12e7c4ab0b Initialise cpu ops after enabling data cache
The cpu-ops pointer was initialized before enabling the data cache in the cold
and warm boot paths. This required a DCIVAC cache maintenance operation to
invalidate any stale cache lines resident in other cpus.

This patch moves this initialization to the bl31_arch_setup() function
which is always called after the data cache and MMU has been enabled.

This change removes the need:
 1. for the DCIVAC cache maintenance operation.
 2. to initialise the CPU ops upon resumption from a PSCI CPU_SUSPEND
    call since memory contents are always preserved in this case.

Change-Id: Ibb2fa2f7460d1a1f1e721242025e382734c204c6
2015-03-13 10:38:09 +00:00
..
services Increment the PSCI VERSION to 1.0 2015-01-26 12:49:32 +00:00
bl31.h Remove all checkpatch errors from codebase 2014-06-24 12:50:00 +01:00
context.h Optimize EL3 register state stored in cpu_context structure 2014-07-31 10:09:58 +01:00
context_mgmt.h Optimize EL3 register state stored in cpu_context structure 2014-07-31 10:09:58 +01:00
cpu_data.h Initialise cpu ops after enabling data cache 2015-03-13 10:38:09 +00:00
interrupt_mgmt.h Demonstrate model for routing IRQs to EL3 2015-01-26 15:29:32 +00:00
runtime_svc.h Implement PSCI_FEATURES API 2015-01-26 12:42:45 +00:00