Max Shvetsov 2825946e92 SPMD: Adds partially supported EL2 registers. ... This patch adds EL2 registers that are supported up to ARMv8.6. ARM_ARCH_MINOR has to specified to enable save/restore routine. Note: Following registers are still not covered in save/restore. * AMEVCNTVOFF0<n>_EL2 * AMEVCNTVOFF1<n>_EL2 * ICH_AP0R<n>_EL2 * ICH_AP1R<n>_EL2 * ICH_LR<n>_EL2 Change-Id: I4813f3243e56e21cb297b31ef549a4b38d4876e1 Signed-off-by: Max Shvetsov <maksims.svecovs@arm.com>		2020-03-03 11:38:26 +00:00
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arch	SPMD: Adds partially supported EL2 registers.	2020-03-03 11:38:26 +00:00
bl1	coverity: fix MISRA violations	2020-02-18 10:47:46 -06:00
bl2	BL2_AT_EL3: Enable pointer authentication support	2019-02-27 11:58:09 +00:00
bl2u	Standardise header guards across codebase	2018-11-08 10:20:19 +00:00
bl31	Use correct type when reading SCR register	2020-01-28 11:10:48 +00:00
bl32	Replace __ASSEMBLY__ with compiler-builtin __ASSEMBLER__	2019-08-01 13:14:12 -07:00
common	FDT wrappers: add functions for read/write bytes	2020-02-03 11:41:27 +00:00
drivers	coreboot: Use generic base address	2020-02-25 09:34:38 +00:00
dt-bindings	stm32mp1: update device tree files	2019-01-18 15:45:08 +01:00
export	Unify type of "cpu_idx" across PSCI module.	2020-01-10 17:11:51 +00:00
lib	SPMD: Adds partially supported EL2 registers.	2020-03-03 11:38:26 +00:00
plat	Merge changes I75f6d135,I4add470e,I0ecd3a2b,I67a63d73 into integration	2020-02-28 16:52:55 +00:00
services	Use consistent SMCCC error code	2020-02-20 10:27:40 +00:00
tools_share	Merge changes from topic "lm/fconf" into integration	2020-02-11 16:15:45 +00:00