Varun Wadekar 2ee2c4f0bb Tegra132: set TZDRAM_BASE to 0xF5C00000 ... The TZDRAM base on the reference platform has been bumped up due to some BL2 memory cleanup. Platforms can also use a different TZDRAM base by setting TZDRAM_BASE=<value> in the build command line. Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>		2015-07-31 10:26:22 +05:30
..
diagrams	Document design of the Interrupt Mangement Framework	2014-06-03 18:42:14 +01:00
plat	Tegra132: set TZDRAM_BASE to 0xF5C00000	2015-07-31 10:26:22 +05:30
spd	Tegra: retrieve BL32's bootargs from bl32_ep_info	2015-07-31 10:26:22 +05:30
auth-framework.md	TBB: add authentication framework documentation	2015-06-25 08:53:27 +01:00
change-log.md	Documentation for version 1.1	2015-02-03 11:43:43 +00:00
cpu-specific-build-macros.md	Miscellaneous doc fixes for v1.1	2015-02-02 17:46:32 +00:00
firmware-design.md	Merge pull request #324 from soby-mathew/sm/sys_suspend	2015-07-02 16:17:11 +01:00
interrupt-framework-design.md	Create Table of Content links in markdown files	2015-01-07 15:01:07 +01:00
porting-guide.md	Merge pull request #324 from soby-mathew/sm/sys_suspend	2015-07-02 16:17:11 +01:00
rt-svc-writers-guide.md	Documentation for version 1.1	2015-02-03 11:43:43 +00:00
trusted-board-boot.md	TBB: add authentication framework documentation	2015-06-25 08:53:27 +01:00
user-guide.md	Update user guide to use Linaro releases	2015-07-15 11:34:22 +01:00