arm-trusted-firmware/plat/nvidia/tegra/soc/t186
Pritesh Raithatha a391d4942a Tegra: smmu: remove context save sequence
SMMU and MC registers are saved as part of the System Suspend sequence.
The register list includes some NS world SMMU registers that need to be
saved by NS world software instead. All that remains as a result are
the MC registers.

This patch moves code to MC file as a result and renames all the
variables and defines to use the MC prefix instead of SMMU. The
Tegra186 and Tegra194 platform ports are updated to provide the MC
context register list to the parent driver. The memory required for
context save is reduced due to removal of the SMMU registers.

Change-Id: I83a05079039f52f9ce91c938ada6cd6dfd9c843f
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
2020-03-11 13:37:26 -07:00
..
drivers Tegra186: add SE support to generate SHA256 of TZRAM 2020-03-09 15:25:16 -07:00
plat_memctrl.c Tegra: smmu: remove context save sequence 2020-03-11 13:37:26 -07:00
plat_psci_handlers.c Tegra: smmu: remove context save sequence 2020-03-11 13:37:26 -07:00
plat_secondary.c Tegra: rename secure scratch register macros 2019-01-23 10:32:48 -08:00
plat_setup.c Tegra186: add support for bpmp_ipc driver 2020-03-09 15:25:16 -07:00
plat_sip_calls.c Tegra186: sip_calls: fix defects flagged by MISRA scan 2019-01-18 09:09:15 -08:00
plat_smmu.c Tegra: smmu: remove context save sequence 2020-03-11 13:37:26 -07:00
plat_trampoline.S Tegra: smmu: remove context save sequence 2020-03-11 13:37:26 -07:00
platform_t186.mk Tegra186: add SE support to generate SHA256 of TZRAM 2020-03-09 15:25:16 -07:00