Dimitris Papastamos 3991a6a49f Use PFR0 to identify need for mitigation of CVE-2017-5715 ... If the CSV2 field reads as 1 then branch targets trained in one context cannot affect speculative execution in a different context. In that case skip the workaround on Cortex A72 and A73. Change-Id: Ide24fb6efc77c548e4296295adc38dca87d042ee Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>		2018-03-14 11:15:44 +00:00
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aarch32	ARMv7: division support for missing __aeabi_*divmod	2017-11-08 14:42:07 +01:00
aarch64	misc_helpers: fix zero_normalmem() for BL2_AT_EL3	2018-02-01 13:17:29 +09:00
compiler-rt	Import ctzdi2.c from LLVM compiler-rt	2017-07-26 09:28:23 +01:00
coreboot	coreboot: Add support for CBMEM console	2018-01-19 15:21:12 -08:00
cpus	Use PFR0 to identify need for mitigation of CVE-2017-5715	2018-03-14 11:15:44 +00:00
el3_runtime	Enable SVE for Non-secure world	2017-11-30 17:45:09 +00:00
extensions	Merge pull request #1282 from robertovargas-arm/misra-changes	2018-02-28 18:53:30 +00:00
libfdt	Use SPDX license identifiers	2017-05-03 09:39:28 +01:00
locks	ARMv7 does not support STL instruction	2017-11-08 13:49:29 +01:00
optee	optee: print header info before validate	2018-02-08 02:17:24 +09:00
pmf	Use SPDX license identifiers	2017-05-03 09:39:28 +01:00
psci	Merge pull request #1282 from robertovargas-arm/misra-changes	2018-02-28 18:53:30 +00:00
semihosting	Use SPDX license identifiers	2017-05-03 09:39:28 +01:00
stack_protector	Use SPDX license identifiers	2017-05-03 09:39:28 +01:00
stdlib	Fix MISRA rule 8.4 in common code	2018-02-28 17:18:46 +00:00
utils	Add mem_region utility functions	2017-09-25 13:32:20 +01:00
xlat_tables	Update ULL() macro and instances of ull to comply with MISRA	2018-02-27 17:05:51 +00:00
xlat_tables_v2	Merge pull request #1282 from robertovargas-arm/misra-changes	2018-02-28 18:53:30 +00:00
zlib	zlib: Fix build error when LOG_LEVEL=50	2018-02-08 09:36:48 +01:00