b4694a8677
The CPU[1-3] are reset to initial/cold boot state (with their reset address set to 0x0). In this state the cpus are waiting for another one to set the reset address to bl31_warm_entrypoint and wake them up. The CPU0 needs a bit of a workaround as changing the reset address either through PSCI mailbox or the mmio mapped RVBAR (at 0xda834650) does not seem to have any effect. Thus the workaround consists in emulating the other CPUs' behavior with a WFE loop and manually jumping to bl31_warm_entrypoint when woken back up by another one. Change-Id: I11265620b5fd0619285e3993253a3f9a3ff6a7a4 Signed-off-by: Remi Pommarel <repk@triplefau.lt> |
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