Javier Almansa Sobrino 0063dd1708 Add support for FEAT_MTPMU for Armv8.6 ... If FEAT_PMUv3 is implemented and PMEVTYPER<n>(_EL0).MT bit is implemented as well, it is possible to control whether PMU counters take into account events happening on other threads. If FEAT_MTPMU is implemented, EL3 (or EL2) can override the MT bit leaving it to effective state of 0 regardless of any write to it. This patch introduces the DISABLE_MTPMU flag, which allows to diable multithread event count from EL3 (or EL2). The flag is disabled by default so the behavior is consistent with those architectures that do not implement FEAT_MTPMU. Signed-off-by: Javier Almansa Sobrino <javier.almansasobrino@arm.com> Change-Id: Iee3a8470ae8ba13316af1bd40c8d4aa86e0cb85e		2020-12-11 12:49:20 +00:00
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aarch64	runtime_exceptions: Update AT speculative workaround	2020-08-18 10:49:27 +01:00
bl31.ld.S	Increase type widths to satisfy width requirements	2020-10-12 10:55:03 -05:00
bl31.mk	Add support for FEAT_MTPMU for Armv8.6	2020-12-11 12:49:20 +00:00
bl31_context_mgmt.c	Coverity: remove unnecessary header file includes	2020-02-04 10:23:51 -06:00
bl31_main.c	arm_fpga: Add support for unknown MPIDs	2020-09-25 15:45:50 +01:00
ehf.c	Minor changes to documentation and comments	2019-02-28 13:35:21 +00:00
interrupt_mgmt.c	Use correct type when reading SCR register	2020-01-28 11:10:48 +00:00