Gerald Lejeune adb4fcfb4c Enable asynchronous abort exceptions during boot ... Asynchronous abort exceptions generated by the platform during cold boot are not taken in EL3 unless SCR_EL3.EA is set. Therefore EA bit is set along with RES1 bits in early BL1 and BL31 architecture initialisation. Further write accesses to SCR_EL3 preserve these bits during cold boot. A build flag controls SCR_EL3.EA value to keep asynchronous abort exceptions being trapped by EL3 after cold boot or not. For further reference SError Interrupts are also known as asynchronous external aborts. On Cortex-A53 revisions below r0p2, asynchronous abort exceptions are taken in EL3 whatever the SCR_EL3.EA value is. Fixes arm-software/tf-issues#368 Signed-off-by: Gerald Lejeune <gerald.lejeune@st.com>		2016-03-30 17:26:23 +02:00
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aarch64	Enable asynchronous abort exceptions during boot	2016-03-30 17:26:23 +02:00
bl31.ld.S	Remove dashes from image names: 'BL3-x' --> 'BL3x'	2015-12-14 12:31:37 +00:00
bl31.mk	Miscellaneous doc fixes for v1.2	2015-12-21 18:10:12 +00:00
bl31_context_mgmt.c	Move context management code to common location	2015-12-09 17:41:18 +00:00
bl31_main.c	Remove dashes from image names: 'BL3-x' --> 'BL3x'	2015-12-14 12:31:37 +00:00
cpu_data_array.c	Rework the crash reporting in BL3-1 to use less stack	2014-07-28 11:03:20 +01:00
interrupt_mgmt.c	Enable support for EL3 interrupt in IMF	2015-12-09 09:58:17 +00:00
runtime_svc.c	Add support for %p in tf_printf()	2016-02-18 09:45:39 +00:00