Heiko Stuebner 7f0b2e78e0 rockchip: really use base+size for secure ddr regions ... The calls to secure ddr regions on rk3288 and rk3399 use parameters of base and size - as it custom for specifying memory regions, but the functions themself expect start and endpoints of the area. This only works by chance for the TZRAM, as it starts a 0x0 and therefore its end location is the same as its size. To not fall into a trap later on adapt the functions to really take base+size parameters. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Change-Id: Idb9fab38aa081f3335a4eca971e7b7f6757fbbab		2019-12-17 01:29:07 +01:00
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drivers	rockchip: really use base+size for secure ddr regions	2019-12-17 01:29:07 +01:00
include	rockchip: Update BL31_BASE to 0x40000	2019-09-20 08:42:53 +08:00
sp_min	rockchip: add support for rk3288	2019-04-25 13:37:56 +02:00
plat_sip_calls.c	rockchip: add support for rk3288	2019-04-25 13:37:56 +02:00
platform.mk	plat/rockchip: Use new bl31_params_parse_helper()	2019-07-24 11:04:03 -07:00
rk3288_def.h	rockchip: Streamline and complete UARTn_BASE macros.	2019-05-01 02:15:43 +02:00