arm-trusted-firmware/plat/ti/k3/include
Nishanth Menon c9f887d8b4 plat: ti: k3: platform_def.h: Define the correct number of max table entries
Since we are using static xlat tables, we need to account for exact
count of table entries we are actually using.
peripherals usart, gic, gtc, sec_proxy_rt, scfg and data account for 6 entries
and are constant, however, we also need to account for:
bl31 full range, codebase, ro_data as additional 3 region

With USE_COHERENT_MEM we do add in 1 extra region as well.

This implies that we will have upto 9 or 10 regions based on
USE_COHERENT_MEM usage. Vs we currently define 8 regions.

This gets exposed with DEBUG=1 and assert checks trigger, which for some
reason completely escaped testing previously.

ASSERT: lib/xlat_tables_v2/xlat_tables_core.c:97
BACKTRACE: START: assert

Signed-off-by: Nishanth Menon <nm@ti.com>
Change-Id: I962cdfc779b4eb3b914fe1c46023d50bc289e6bc
2021-03-26 02:25:44 -05:00
..
k3_console.h Standardise header guards across codebase 2018-11-08 10:20:19 +00:00
k3_gicv3.h ti: k3: common: Add support for runtime detection of GICR base address 2019-01-22 13:11:09 -06:00
plat_macros.S Standardise header guards across codebase 2018-11-08 10:20:19 +00:00
platform_def.h plat: ti: k3: platform_def.h: Define the correct number of max table entries 2021-03-26 02:25:44 -05:00