Varun Wadekar d336030169 Tegra: GIC: enable FIQ interrupt handling ... Tegra chips support multiple FIQ interrupt sources. These interrupts are enabled in the GICD/GICC interfaces by the tegra_gic driver. A new FIQ handler would be added in a subsequent change which can be registered by the platform code. This patch adds the GIC programming as part of the tegra_gic_setup() which now takes an array of all the FIQ interrupts to be enabled for the platform. The Tegra132 and Tegra210 platforms right now do not register for any FIQ interrupts themselves, but will definitely use this support in the future. Change-Id: I0ea164be901cd6681167028fea0567399f18d4b8 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>		2017-02-28 08:50:01 -08:00
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plat_psci_handlers.c	Tegra: allow individual SoCs to restore their settings	2017-02-23 11:52:10 -08:00
plat_secondary.c	Tegra: Support for Tegra's T132 platforms	2015-07-24 09:25:23 +05:30
plat_setup.c	Tegra: GIC: enable FIQ interrupt handling	2017-02-28 08:50:01 -08:00
plat_sip_calls.c	Tegra: handlers for common and SoC-specific SiP calls	2017-02-23 10:42:57 -08:00
platform_t132.mk	Tegra: init normal/crash console for platforms	2017-02-22 09:16:34 -08:00