Jimmy Brisson 2c4b0c05c6 fix(rk3399/suspend): correct LPDDR4 resume sequence ... This change adds 208 bytes to PMUSRAM, pushing the end of text from 0xff3b0de0 to 0xff3b0eb0, which is still shy of the maximum 0xff3b1000. Further, this skips enabling the watchdog when it's not being used elsewhere, as you can't turn the watchdog off. Change-Id: I2e6fa3c7e01f2be6b32ce04ce479edf64e278554 Signed-off-by: Jimmy Brisson <jimmy.brisson@arm.com>		2021-07-19 23:06:33 +02:00
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dp	rockchip: Prevent macro expansion in paths	2019-12-13 14:13:45 -06:00
dram	fix(rk3399/suspend): correct LPDDR4 resume sequence	2021-07-19 23:06:33 +02:00
gpio	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00
m0	rk3399: m0: Fix compiler warnings.	2019-04-24 23:03:10 +02:00
pmu	fix(rk3399/suspend): correct LPDDR4 resume sequence	2021-07-19 23:06:33 +02:00
pwm	Standardise header guards across codebase	2018-11-08 10:20:19 +00:00
secure	rockchip: really use base+size for secure ddr regions	2019-12-17 01:29:07 +01:00
soc	plat/rockchip: enable power domains of rk3399 before reset	2019-12-10 20:55:00 +00:00