Zelalem Aweke 596d20d9e4 fix(pie): invalidate data cache in the entire image range if PIE is enabled ... Currently on image entry, the data cache in the RW address range is invalidated before MMU is enabled to safeguard against potential stale data from previous firmware stage. If PIE is enabled however, RO sections including the GOT may be also modified during pie fixup. Therefore, to be on the safe side, invalidate the entire image region if PIE is enabled. Signed-off-by: Zelalem Aweke <zelalem.aweke@arm.com> Change-Id: I7ee2a324fe4377b026e32f9ab842617ad4e09d89		2021-10-19 21:30:56 +02:00
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arch.h	feat(trf): initialize trap settings of trace filter control registers access	2021-08-26 09:29:51 +01:00
arch_features.h	drivers: generic_delay_timer: Assert presence of Generic Timer	2019-02-06 09:54:42 +00:00
arch_helpers.h	feat(trf): enable trace filter control register access from lower NS EL	2021-08-26 09:32:35 +01:00
asm_macros.S	arch: Enable `FEAT_SB` for supported non-Armv8.5-A platforms	2021-03-18 12:34:34 +01:00
assert_macros.S	Reorganize architecture-dependent header files	2019-01-04 10:43:16 +00:00
console_macros.S	console: update skeleton	2019-07-16 13:01:02 +00:00
el3_common_macros.S	fix(pie): invalidate data cache in the entire image range if PIE is enabled	2021-10-19 21:30:56 +02:00
smccc_helpers.h	Changes to support updated register usage in SMCCC v1.2	2019-11-26 12:56:30 -06:00
smccc_macros.S	aarch32: stop speculative execution past exception returns	2020-03-01 06:44:30 -06:00