Upstream fork of ATF with a couple of rk3399 patches to remove HDCP blob and increase BAUD_RATE.
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Manish V Badarkhe 5de20ece38 feat(trf): initialize trap settings of trace filter control registers access
Trap bits of trace filter control registers access are in
architecturally UNKNOWN state at boot hence

1. Initialized trap bits to one to prohibit trace filter control
   registers accesses in lower ELs (EL2, EL1) in all security states
   when FEAT_TRF is implemented.
2. These bits are RES0 when FEAT_TRF is not implemented and hence set
   it to zero to aligns with the Arm ARM reference recommendation,
   that mentions software must writes RES0 bits with all 0s.

Change-Id: I1b7abf2170ece84ee585c91cda32d22b25c0fc34
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
2021-08-26 09:29:51 +01:00
.husky build(hooks): add commitlint hook 2021-04-19 14:06:25 +01:00
bl1 Add PIE support for AARCH32 2021-04-21 15:05:57 +02:00
bl2 feat(fwu): initialize FWU driver in BL2 2021-08-02 17:15:40 +01:00
bl2u Avoid the use of linker *_SIZE__ macros 2021-04-21 15:05:57 +02:00
bl31 feat(sys_reg_trace): enable trace system registers access from lower NS ELs 2021-08-26 09:29:51 +01:00
bl32 feat(sys_reg_trace): enable trace system registers access from lower NS ELs 2021-08-26 09:29:51 +01:00
common refactor(hw_crc32): renamed hw_crc32 to tf_crc32 2021-08-02 17:15:41 +01:00
docs feat(sys_reg_trace): enable trace system registers access from lower NS ELs 2021-08-26 09:29:51 +01:00
drivers Merge changes Id93c4573,Ib7fea862,I44b9e5a9,I9e0ef734,I94d550ce, ... into integration 2021-08-13 10:16:20 +02:00
fdts feat(plat/arm): Introduce TC1 platform 2021-08-11 11:36:50 +01:00
include feat(trf): initialize trap settings of trace filter control registers access 2021-08-26 09:29:51 +01:00
lib feat(sys_reg_trace): enable trace system registers access from lower NS ELs 2021-08-26 09:29:51 +01:00
licenses docs(license): rectify `arm-gic.h` license 2021-04-26 12:36:00 +01:00
make_helpers feat(sys_reg_trace): enable trace system registers access from lower NS ELs 2021-08-26 09:29:51 +01:00
plat Merge changes from topic "allwinner-r329" into integration 2021-08-25 10:49:42 +02:00
services services: Fix pmr_el1 rewrote issue in sdei_disaptch_event() 2021-07-28 11:12:44 +02:00
tools fix(tools/stm32image): improve the tool 2021-06-22 14:10:27 +02:00
.checkpatch.conf Re-apply GIT_COMMIT_ID check for checkpatch 2019-07-12 11:06:24 +01:00
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Makefile feat(sys_reg_trace): enable trace system registers access from lower NS ELs 2021-08-26 09:29:51 +01:00
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dco.txt Drop requirement for CLA in contribution.md 2016-09-27 21:52:03 +01:00
license.rst doc: De-duplicate readme and license files 2019-10-08 16:36:15 +00:00
package-lock.json build(deps): bump path-parse from 1.0.6 to 1.0.7 2021-08-13 10:12:00 +01:00
package.json build(hooks): update Commitizen to ^4.2.4 2021-05-12 15:43:56 +01:00
readme.rst doc: Formatting fixes for readme.rst 2019-10-09 15:37:59 +00:00

readme.rst

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Trusted Firmware-A

Trusted Firmware-A (TF-A) is a reference implementation of secure world software for Arm A-Profile architectures (Armv8-A and Armv7-A), including an Exception Level 3 (EL3) Secure Monitor. It provides a suitable starting point for productization of secure world boot and runtime firmware, in either the AArch32 or AArch64 execution states.

TF-A implements Arm interface standards, including:

The code is designed to be portable and reusable across hardware platforms and software models that are based on the Armv8-A and Armv7-A architectures.

In collaboration with interested parties, we will continue to enhance TF-A with reference implementations of Arm standards to benefit developers working with Armv7-A and Armv8-A TrustZone technology.

Users are encouraged to do their own security validation, including penetration testing, on any secure world code derived from TF-A.

More Info and Documentation

To find out more about Trusted Firmware-A, please view the full documentation that is available through trustedfirmware.org.


Copyright (c) 2013-2019, Arm Limited and Contributors. All rights reserved.

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