62056e4e8f
This allows the BL31 port to run with position-independent execution enabled so that it can be ran from any address in the system. This increases the flexibility of the image, allowing it to be ran from other locations rather than only its hardcoded absolute address (currently set to the typical DRAM base of 2GB). This may be useful for future images that describe system configurations with other memory layouts (e.g. where SRAM is included). It does this by setting ENABLE_PIE=1 and changing the absolute address to 0. The load address of bl31.bin can then be specified by the -l [load address] argument in the fpga-run command (additionally, this address is required by any preceding payloads that specify the start address. For ELF payloads this is usually extracted automatically by reading the entrypoint address in the header, however bl31.bin is a different file format so has this additional dependency). Signed-off-by: Oliver Swede <oli.swede@arm.com> Change-Id: Idd74787796ab0cf605fe2701163d9c4b3223a143 |
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| .. | ||
| a5ds | ||
| arm_fpga | ||
| common | ||
| corstone700 | ||
| fvp | ||
| fvp_ve | ||
| juno | ||
| n1sdp | ||
| rddaniel | ||
| rde1edge | ||
| rdn1edge | ||
| sgi575 | ||
| sgm775 | ||