Harvey Hsieh 6b51766cb0 Tegra: SiP: 64-bit address for Video Memory base ... This patch allows the NS world to pass 64-bit base address for the Video Memory carveout region. Change-Id: I7e47cc1f5425bd39c6763755b801517013e1e0cd Signed-off-by: Harvey Hsieh <hhsieh@nvidia.com> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>		2017-03-02 13:02:37 -08:00
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common	Tegra: SiP: 64-bit address for Video Memory base	2017-03-02 13:02:37 -08:00
include	Tegra: increase ADDR_SPACE_SIZE to 35 bits	2017-03-02 13:02:27 -08:00
soc	Tegra210: new TZDRAM base address	2017-03-02 13:01:50 -08:00
platform.mk	Tegra: Disable A57/A53 cache non-temporal hints	2017-02-27 09:44:22 -08:00