Michal Simek bb1768c67e fix(xilinx): fix coding style violations ... Fix coding style violations and alignments: - Remove additional newlines in headers - Remove additional newlines in code - Add newline to separate variable from the code - Use the same indentation in platform.mk - Align function parameters - Use tabs for indentation in kernel-doc format Signed-off-by: Michal Simek <michal.simek@xilinx.com> Change-Id: I0b12804ff63bc19778e8f21041f9accba5b488b9		2022-03-09 09:14:33 +01:00
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aarch64	feat(versal): remove the time stamp configuration	2022-03-01 21:20:21 -07:00
include	fix(plat/xilinx/versal): resolve misra R10.3	2021-11-30 02:00:01 -08:00
pm_service	fix(xilinx): fix coding style violations	2022-03-09 09:14:33 +01:00
bl31_versal_setup.c	fix(versal): fix the incorrect log message	2022-03-06 21:09:23 -07:00
plat_psci.c	fix(plat/xilinx/versal): resolve misra R14.4	2021-11-30 02:00:01 -08:00
plat_topology.c	arm64: versal: Add support for new Xilinx Versal ACAPs	2018-11-09 15:06:53 +05:30
plat_versal.c	fix(plat/xilinx/versal): resolve misra R14.4	2021-11-30 02:00:01 -08:00
platform.mk	feat(plat/versal): add support for SLS mitigation	2021-07-20 22:33:47 -06:00
sip_svc_setup.c	fix(plat/xilinx/versal): resolve misra R17.7	2021-11-30 02:00:01 -08:00
versal_gicv3.c	plat: xilinx: versal: Move versal_private.h to include directory	2020-01-15 11:01:28 -08:00
versal_ipi.c	fix(plat/xilinx/versal): resolve misra R7.2	2021-11-30 02:00:01 -08:00