Harvey Hsieh 719f3ec242 Tegra: memctrl_v2: save TZDRAM settings to secure scratch registers ... Save TZDRAM settings for SC7 resume firmware to restore. SECURITY_BOM: MC_SECURITY_CFG0_0 = SECURE_RSV55_SCRATCH_0 SECURITY_BOM_HI: MC_SECURITY_CFG3_0 = SECURE_RSV55_SCRATCH_1 SECURITY_SIZE_MB: MC_SECURITY_CFG1_0 = SECURE_RSV54_SCRATCH_1 Change-Id: I78e891d9ebf576ff2a17ff87cf3aff4030ee11b8 Signed-off-by: Harvey Hsieh <hhsieh@nvidia.com> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>		2017-04-05 13:56:29 -07:00
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drivers	Tegra: smmu: disable TCU prefetch for all the 64 contexts	2017-03-30 16:49:05 -07:00
t132	Tegra: support for silicon/simulation platforms	2017-03-02 13:01:01 -08:00
t186	Tegra: memctrl_v2: save TZDRAM settings to secure scratch registers	2017-04-05 13:56:29 -07:00
t210	Tegra: support for silicon/simulation platforms	2017-03-02 13:01:01 -08:00
plat_macros.S	Tegra: fix logic to calculate GICD_ISPENDR register address	2017-03-02 13:01:25 -08:00
platform_def.h	Tegra: increase ADDR_SPACE_SIZE to 35 bits	2017-03-02 13:02:27 -08:00
tegra_platform.h	Tegra: public interfaces to get the chip's major/minor versions	2017-03-20 08:54:16 -07:00
tegra_private.h	Tegra186: save/restore BL31 context to/from TZDRAM	2017-03-23 14:17:32 -07:00