Madhukar Pappireddy e34cc0cedc Changes to support updated register usage in SMCCC v1.2 ... From AArch64 state, arguments are passed in registers W0-W7(X0-X7) and results are returned in W0-W7(X0-X7) for SMC32(SMC64) calls. From AArch32 state, arguments are passed in registers R0-R7 and results are returned in registers R0-R7 for SMC32 calls. Most of the functions and macros already existed to support using upto 8 registers for passing/returning parameters/results. Added few helper macros for SMC calls from AArch32 state. Link to the specification: https://developer.arm.com/docs/den0028/c Change-Id: I87976b42454dc3fc45c8343e9640aa78210e9741 Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>		2019-11-26 12:56:30 -06:00
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aarch32	Changes to support updated register usage in SMCCC v1.2	2019-11-26 12:56:30 -06:00
aarch64	Explicitly disable the SPME bit in MDCR_EL3	2019-10-07 11:50:07 +01:00