arm-trusted-firmware/include/arch/aarch32
Madhukar Pappireddy e34cc0cedc Changes to support updated register usage in SMCCC v1.2
From AArch64 state, arguments are passed in registers W0-W7(X0-X7)
and results are returned in W0-W7(X0-X7) for SMC32(SMC64) calls.
From AArch32 state, arguments are passed in registers R0-R7 and
results are returned in registers R0-R7 for SMC32 calls.

Most of the functions and macros already existed to support using
upto 8 registers for passing/returning parameters/results. Added
few helper macros for SMC calls from AArch32 state.

Link to the specification:
https://developer.arm.com/docs/den0028/c

Change-Id: I87976b42454dc3fc45c8343e9640aa78210e9741
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
2019-11-26 12:56:30 -06:00
..
arch.h AArch32: Disable Secure Cycle Counter 2019-09-26 15:36:02 +00:00
arch_features.h drivers: generic_delay_timer: Assert presence of Generic Timer 2019-02-06 09:54:42 +00:00
arch_helpers.h Cortex-A53: Workarounds for 819472, 824069 and 827319 2019-02-28 09:56:58 +00:00
asm_macros.S Division functionality for cores that dont have divide hardware. 2019-02-19 17:07:48 +00:00
assert_macros.S Reorganize architecture-dependent header files 2019-01-04 10:43:16 +00:00
console_macros.S console: update skeleton 2019-07-16 13:01:02 +00:00
el3_common_macros.S Add missing support for BL2_AT_EL3 in XIP memory 2019-10-02 09:06:39 +02:00
smccc_helpers.h Changes to support updated register usage in SMCCC v1.2 2019-11-26 12:56:30 -06:00
smccc_macros.S AArch32: Disable Secure Cycle Counter 2019-09-26 15:36:02 +00:00