Varun Wadekar aa1bdc960c Tegra186: fix per-cpu wake times for CPU power states ... This patch fixes the logic used to calculate the CPU index for storing the per-cpu wake times. We use the MIDR register to calculate the CPU index now. This allows us to store values for Denver/A57 CPUs properly. Change-Id: I9df0377afd4b92bbdaea495c0df06a9780a99d09 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>		2017-03-20 09:14:16 -07:00
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t132	Tegra: GIC: enable FIQ interrupt handling	2017-02-28 08:50:01 -08:00
t186	Tegra186: fix per-cpu wake times for CPU power states	2017-03-20 09:14:16 -07:00
t210	plat/tegra: Enable Cortex-A53 erratum 855873 workaround	2017-03-20 10:57:50 +00:00