Sandrine Bailleux 54035fc467 Disable non-temporal hint on Cortex-A53/57 ... The LDNP/STNP instructions as implemented on Cortex-A53 and Cortex-A57 do not behave in a way most programmers expect, and will most probably result in a significant speed degradation to any code that employs them. The ARMv8-A architecture (see Document ARM DDI 0487A.h, section D3.4.3) allows cores to ignore the non-temporal hint and treat LDNP/STNP as LDP/STP instead. This patch introduces 2 new build flags: A53_DISABLE_NON_TEMPORAL_HINT and A57_DISABLE_NON_TEMPORAL_HINT to enforce this behaviour on Cortex-A53 and Cortex-A57. They are enabled by default. The string printed in debug builds when a specific CPU errata workaround is compiled in but skipped at runtime has been generalised, so that it can be reused for the non-temporal hint use case as well. Change-Id: I3e354f4797fd5d3959872a678e160322b13867a1		2016-02-08 09:31:18 +00:00
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bl1	FWU: Add Generic Firmware Update framework support in BL1	2015-12-09 17:41:18 +00:00
bl31	Remove direct usage of __attribute__((foo))	2016-01-14 10:55:17 -08:00
bl32	Enable use of FIQs and IRQs as TSP interrupts	2015-12-04 12:02:12 +00:00
common	Migrate __warn_deprecated -> __deprecated	2016-01-14 10:55:17 -08:00
drivers	Merge pull request #501 from jcastillo-arm/jc/tf-issues/300	2016-02-01 19:03:41 +00:00
lib	Disable non-temporal hint on Cortex-A53/57	2016-02-08 09:31:18 +00:00
plat	Use tf_printf() for debug logs from xlat_tables.c	2016-02-01 10:10:09 +00:00
stdlib	cdefs.h: Use __deprecated__ instead of deprecated	2016-01-20 15:45:39 -08:00