arm-trusted-firmware/plat/renesas/common/include
Toshiyuki Ogasahara 63a7a34706 feat(plat/rcar3): add SYSCEXTMASK bit set/clear in scu_power_up
Added the process of SYSECEXTMASK bit set/clear for following
power Resume/Shutoff flow.

Signed-off-by: Hideyuki Nitta <hideyuki.nitta.jf@hitachi.com>
Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Change-Id: I71ed22840a42e7ab7d87bfd4241eec6f5ddb129b
2021-09-12 01:13:48 +02:00
..
registers fix(drivers/rcar3): fix CPG registers redefinition 2021-07-10 17:35:20 +02:00
plat.ld.S plat: renesas: Move headers and assembly files to common folder 2021-01-13 13:03:48 +00:00
plat_macros.S plat: renesas: Move headers and assembly files to common folder 2021-01-13 13:03:48 +00:00
platform_def.h feat(plat/rcar3): change the memory map for OP-TEE 2021-09-12 01:13:48 +02:00
rcar_def.h feat(plat/rcar3): add SYSCEXTMASK bit set/clear in scu_power_up 2021-09-12 01:13:48 +02:00
rcar_private.h plat: renesas: Move headers and assembly files to common folder 2021-01-13 13:03:48 +00:00
rcar_version.h feat(plat/rcar3): update IPL and Secure Monitor Rev.3.0.0 2021-07-10 17:35:39 +02:00