8a855bd243
Cortex-A710 erratum 2136059 is a Cat B erratum that applies to revisions r0p0, r1p0 and r2p0 of the CPU. It is fixed in r2p1. The workaround is to set CPUACTLR5_EL1[44] to 1 which will cause the CPP instruction to invalidate the hardware prefetcher state trained from any EL. SDEN can be found here: https://developer.arm.com/documentation/SDEN1775101/latest Signed-off-by: Bipin Ravi <bipin.ravi@arm.com> Change-Id: I43a86a365418fb663cc1b6ab1d365b4beddae0bc |
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| .. | ||
| alt-boot-flows.rst | ||
| auth-framework.rst | ||
| cpu-specific-build-macros.rst | ||
| firmware-design.rst | ||
| index.rst | ||
| interrupt-framework-design.rst | ||
| psci-pd-tree.rst | ||
| reset-design.rst | ||
| trusted-board-boot-build.rst | ||
| trusted-board-boot.rst | ||