Soby Mathew 8cd16e6b5b Build option to include AArch32 registers in cpu context ... The system registers that are saved and restored in CPU context include AArch32 systems registers like SPSR_ABT, SPSR_UND, SPSR_IRQ, SPSR_FIQ, DACR32_EL2, IFSR32_EL2 and FPEXC32_EL2. Accessing these registers on an AArch64-only (i.e. on hardware that does not implement AArch32, or at least not at EL1 and higher ELs) platform leads to an exception. This patch introduces the build option `CTX_INCLUDE_AARCH32_REGS` to specify whether to include these AArch32 systems registers in the cpu context or not. By default this build option is set to 1 to ensure compatibility. AArch64-only platforms must set it to 0. A runtime check is added in BL1 and BL31 cold boot path to verify this. Fixes ARM-software/tf-issues#386 Change-Id: I720cdbd7ed7f7d8516635a2ec80d025f478b95ee		2016-06-03 10:50:52 +01:00
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tbbr	Replace all SCP FW (BL0, BL3-0) references	2015-12-14 12:31:16 +00:00
asm_macros.S	Replace build macro WARN_DEPRECATED with ERROR_DEPRECATED	2015-11-24 11:15:41 +00:00
assert_macros.S	Add header guards to asm macro files	2015-04-27 18:06:24 +01:00
bl_common.h	Fix the inconsistencies in bl1_tbbr_image_descs[]	2016-02-22 18:17:34 +00:00
context.h	Build option to include AArch32 registers in cpu context	2016-06-03 10:50:52 +01:00
context_mgmt.h	Fix build error with optimizations disabled (-O0)	2016-04-14 16:24:03 +01:00
debug.h	Make cpu operations warning a VERBOSE print	2016-03-22 10:00:42 +00:00
el3_common_macros.S	Enable SCR_EL3.SIF bit	2016-04-07 16:30:45 +01:00
firmware_image_package.h	Replace all SCP FW (BL0, BL3-0) references	2015-12-14 12:31:16 +00:00
smcc_helpers.h	Move context management code to common location	2015-12-09 17:41:18 +00:00