Manish V Badarkhe f20eb893a0 feat(spe): add support for FEAT_SPEv1p2 ... Allow access to PMSNEVFR_EL1 register at NS-EL1 or NS-EL2 when FEAT_SPEv1p2 is implemented. Change-Id: I44b1de93526dbe9c11fd061d876371a6c0e6fa9c Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>		2022-02-10 09:30:13 +00:00
..
amu	fix: libc: use long for 64-bit types on aarch64	2021-11-08 14:41:17 +00:00
mpam	TF-A: Fix wrong register read for MPAM extension	2020-05-26 15:39:52 +00:00
mtpmu	Add support for FEAT_MTPMU for Armv8.6	2020-12-11 12:49:20 +00:00
pauth	TF-A: Add support for ARMv8.3-PAuth in BL1 SMC calls and BL2U	2019-10-03 14:43:55 +01:00
ras	lib/extensions/ras: fix bug of binary search	2021-01-14 09:27:16 +08:00
sme	feat(sme): enable SME functionality	2021-11-12 10:38:00 -06:00
spe	feat(spe): add support for FEAT_SPEv1p2	2022-02-10 09:30:13 +00:00
sve	feat(sme): enable SME functionality	2021-11-12 10:38:00 -06:00
sys_reg_trace	feat(sys_reg_trace): enable trace system registers access from lower NS ELs	2021-08-26 09:29:51 +01:00
trbe	feat(trbe): enable access to trace buffer control registers from lower NS EL	2021-08-26 09:29:39 +01:00
trf	feat(trf): enable trace filter control register access from lower NS EL	2021-08-26 09:32:35 +01:00