Varun Wadekar 2f583f8e6d Tegra: memctrl_v2: TZRAM aperture configuration settings ... This patch enables the configuration settings for the TZRAM aperture by programming the base/size of the aperture and restricting access to it. We allow only the CPU to read/write by programming the access configuration registers to 0. Change-Id: Ie16ad29f4c5ec7aafa972b0a0230b4790ad5619e Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>		2017-03-30 16:49:05 -07:00
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drivers	Tegra: memctrl_v2: TZRAM aperture configuration settings	2017-03-30 16:49:05 -07:00
t132	Tegra: support for silicon/simulation platforms	2017-03-02 13:01:01 -08:00
t186	Tegra: memctrl_v2: TZRAM aperture configuration settings	2017-03-30 16:49:05 -07:00
t210	Tegra: support for silicon/simulation platforms	2017-03-02 13:01:01 -08:00
plat_macros.S	Tegra: fix logic to calculate GICD_ISPENDR register address	2017-03-02 13:01:25 -08:00
platform_def.h	Tegra: increase ADDR_SPACE_SIZE to 35 bits	2017-03-02 13:02:27 -08:00
tegra_platform.h	Tegra: public interfaces to get the chip's major/minor versions	2017-03-20 08:54:16 -07:00
tegra_private.h	Tegra186: save/restore BL31 context to/from TZDRAM	2017-03-23 14:17:32 -07:00